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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MC68HC908JK3CDW
寤�(ch菐ng)鍟嗭細 Freescale Semiconductor
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 87/212闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU 8MHZ 4K FLASH 20-SOIC
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 38
绯诲垪锛� HC08
鏍稿績铏曠悊鍣細 HC08
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
澶栧湇瑷�(sh猫)鍌欙細 LED锛孡VD锛孭OR锛孭WM
杓稿叆/杓稿嚭鏁�(sh霉)锛� 15
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 4KB锛�4K x 8锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ(l猫i)鍨嬶細 闁冨瓨
RAM 瀹归噺锛� 128 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 3.3 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 12x8b
鎸暕鍣ㄥ瀷锛� 澶栭儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 20-SOIC锛�0.295"锛�7.50mm 瀵級
鍖呰锛� 绠′欢
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Computer Operating Properly (COP)
MC68H(R)C908JL3 鈥� Rev. 1.1
Technical Data
Freescale Semiconductor
Computer Operating Properly (COP)
175
NOTE:
Service the COP immediately after reset and before entering or after
exiting stop mode to guarantee the maximum time before the first COP
counter overflow.
A COP reset pulls the RST pin low for 32
脳 2OSCOUT cycles and sets
the COP bit in the reset status register (RSR). (See 7.8.2 Reset Status
NOTE:
Place COP clearing instructions in the main program and not in an
interrupt subroutine. Such an interrupt subroutine could keep the COP
from generating a reset even while the main program is not working
properly.
15.4 I/O Signals
The following paragraphs describe the signals shown in Figure 15-1.
15.4.1 2OSCOUT
2OSCOUT is the oscillator output signal. 2OSCOUT frequency is equal
to the crystal frequency or the RC-oscillator frequency.
15.4.2 COPCTL Write
Writing any value to the COP control register (COPCTL) (see 15.5 COP
Control Register) clears the COP counter and clears bits 12 through 5
of the SIM counter. Reading the COP control register returns the low
byte of the reset vector.
15.4.3 Power-On Reset
The power-on reset (POR) circuit in the SIM clears the SIM counter
4096
脳 2OSCOUT cycles after power-up.
15.4.4 Internal Reset
An internal reset clears the SIM counter and the COP counter.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
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EHFWX2BPKG CONN EEE1394 FMAL T/H CROSS BLK
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鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
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MC68HC908JK8MDWE 鍒堕€犲晢:Freescale Semiconductor 鍔熻兘鎻忚堪: