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MC68HC812A4
—
Rev. 3.0
Advance Information
164
Clock Module
MOTOROLA
Clock Module
CME — Clock Monitor Enable Bit
Write: Anytime
CME enables the clock monitor. If the force clock monitor enable bit,
FCME, is set, CME has no meaning or effect.
1 = Clock monitor enabled
0 = Clock monitor disabled
NOTE:
Clear the CME bit before executing a STOP instruction and set the CME
bit after exiting stop mode.
FCME — Force Clock Monitor Enable Bit
Write: Once in normal modes, anytime in special modes
FCME forces the clock monitor to be enabled until a reset occurs.
When FCME is set, the CME bit has no effect.
1 = Clock monitor enabled
0 = CME bit enables or disables clock monitor
NOTE:
Clear the FCME bit in applications that use the STOP instruction and the
clock monitor.
FCM — Force Clock Monitor Reset Bit
Write: Never in normal modes, anytime in special modes
FCM forces a reset when the clock monitor is enabled and detects a
slow or stopped clock.
1 = Clock monitor reset enabled
0 = Normal operation
NOTE:
When the disable reset bit, DISR, is set, FCM has no effect.
FCOP — Force COP Reset Bit
Write: Never in normal modes; anytime in special modes
FCOP forces a reset when the COP is enabled and times out.
1 = COP reset enabled
0 = Normal operation
NOTE:
When the disable reset bit, DISR, is set, FCOP has no effect.