參數(shù)資料
型號: MC68HC705P6ACDW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Microcontroller Unit
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 43/130頁
文件大小: 1541K
代理商: MC68HC705P6ACDW
Resets
Internal Resets
MC68HC705P6A
Rev. 2.0
Advance Information
MOTOROLA
Resets
43
voltage range (between V
SS
V
DD
), the COP watchdog timer
s output will
be restored if the COP bit in the mask option register (MOR) is set.
The COP register is shared with the least significant byte (LSB) of an
unused vector address as shown in
Figure 4-2
. Reading this location will
return the programmed value of the unused user interrupt vector,
usually 0. Writing to this location will clear the COP watchdog timer.
When the COP watchdog timer expires, it will generate the RST signal
and reset the MCU. If any other reset function is active at the end of the
COP reset signal, the RST signal will remain in the reset condition until
the other reset condition(s) end. When the reset condition ends, the
MCU
s operating mode will be selected (see
Table 3-1
).
Address:
$1FF0
Bit 7
6
5
4
3
2
1
Bit 0
Read:
0
0
0
0
0
0
0
0
Write:
COPR
= Unimplemented
Figure 4-2. Unused Vector and COP Watchdog Timer
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