參數(shù)資料
型號: MC68HC705JB4P
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 126/134頁
文件大?。?/td> 1305K
代理商: MC68HC705JB4P
February 24, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05JB4
UNIVERSAL SERIAL BUS MODULE
MOTOROLA
REV 2
10-25
10.5.7 USB Status Register (USR)
RSEQ — Endpoint 0 Receive Sequence Bit
This read only bit indicates the type of data packet last received for Endpoint 0
(DATA0 or DATA1).
1 =
DATA1 Token received in last Endpoint 0 receive
0 =
DATA0 Token received in last Endpoint 0 receive
SETUP — SETUP Token Detect Bit
This read only bit indicates that a valid SETUP token has been received.
1 =
Last token received for Endpoint 0 was a SETUP token
0 =
Last token received for Endpoint 0 was not a SETUP token
RPSIZ3-RPSIZ0 — Endpoint 0 Receive Data Packet Size
These read only bits store the number of data bytes received for the last OUT
or SETUP transaction for Endpoint 0. These bits are not affected by reset.
10.5.8 USB Endpoint 0 Data Registers (UE0D0-UE0D7)
UE0RD7 - UE0RD0 — Endpoint 0 Receive Data Buffer
These read only bits are serially loaded with OUT token or SETUP token data
received over the USB’s D+ and D– pins.
UE0TD7 - UE0TD0 — Endpoint 0 Transmit Data Buffer
These write only buffers are loaded by software with data to be sent on the
USB bus on the next IN token directed at Endpoint 0.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
USR
R
RSEQ
SETUP
0
RPSIZ3
RPSIZ2
RPSIZ1
RPSIZ0
$003D
W
reset:
UUUUUUUU
= Unimplemented
Figure 10-26. USB Status Register (USR)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
UE0D0
R
UE0RD7 UE0RD6 UE0RD5 UE0RD4 UE0RD3 UE0RD2 UE0RD1 UE0RD0
$0020
W
UE0TD7 UE0TD6 UE0TD5 UE0TD4 UE0TD3 UE0TD2 UE0TD1 UE0TD0
to
::::::::
UE0D7
R
UE0RD7 UE0RD6 UE0RD5 UE0RD4 UE0RD3 UE0RD2 UE0RD1 UE0RD0
$0027
W
UE0TD7 UE0TD6 UE0TD5 UE0TD4 UE0TD3 UE0TD2 UE0TD1 UE0TD0
reset:
XXXXXXXX
Figure 10-27. USB Endpoint 0 Data Register (UE0D0-UE0D7)
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