參數(shù)資料
型號(hào): MC68HC11F1CFN4
廠商: Freescale Semiconductor
文件頁數(shù): 25/158頁
文件大小: 0K
描述: IC MCU 512 EEPROM 4MHZ 68-PLCC
標(biāo)準(zhǔn)包裝: 18
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 4MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 30
程序存儲(chǔ)器類型: ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 68-LCC(J 形引線)
包裝: 管件
TIMING SYSTEM
MC68HC11F1
9-14
TECHNICAL DATA
9.4.2 Timer Interrupt Flag Register 2
Bits of this register indicate the occurrence of timer system events. Coupled with the
four high-order bits of TMSK2, the bits of TFLG2 allow the timer subsystem to operate
in either a polled or interrupt driven system. Each bit of TFLG2 corresponds to a bit in
TMSK2 in the same position.
Clear flags by writing a one to the corresponding bit position(s).
TOF — Timer Overflow Interrupt Flag
Set when TCNT changes from $FFFF to $0000
RTIF — Real-Time Interrupt Flag
The RTIF status bit is automatically set to one at the end of every RTI period. To clear
RTIF, write a byte to TFLG2 with bit 6 set.
PAOVF — Pulse Accumulator Overflow Interrupt Flag
PAIF — Pulse Accumulator Input Edge Interrupt Flag
Bits [3:0] — Not implemented
Always read zero
9.4.3 Pulse Accumulator Control Register
Bits RTR[1:0] of this register select the rate for the RTI system. The remaining bits con-
trol the pulse accumulator and IC4/OC5 functions.
Bit 7 — Not implemented
Always reads zero
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
TFLG2 — Timer Interrupt Flag 2
$1025
Bit 7
654321
Bit 0
TOF
RTIF
PAOVF
PAIF
RESET:
0000000
0
PACTL — Pulse Accumulator Control
$1026
Bit 7
654321
Bit 0
PAEN
PAMOD
PEDGE
I4/O5
RTR1
RTR0
RESET:
0000000
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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