參數(shù)資料
型號： MC68HC11F1CFN2
廠商： Freescale Semiconductor
文件頁數(shù)： 10/158頁
文件大?。?/td> 0K
描述： IC MCU 512 EEPROM 2MHZ 68-PLCC
標準包裝： 18
系列： HC11
核心處理器： HC11
芯體尺寸： 8-位
速度： 2MHz
連通性： SCI，SPI
外圍設(shè)備： POR，WDT
輸入/輸出數(shù)： 30
程序存儲器類型： ROMless
EEPROM 大?。?/td> 512 x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 4.75 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x8b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 68-LCC（J 形引線）
包裝： 管件
TIMING SYSTEM
TECHNICAL DATA
9-1
SECTION 9 TIMING SYSTEM
The M68HC11 timing system is composed of five clock divider chains. The main clock
divider chain includes a 16-bit free-running counter, which is driven by a programma-
ble prescaler. The main timer's programmable prescaler provides one of the four
clocking rates to drive the 16-bit counter. Two prescaler control bits select the prescale
rate.
The prescaler output divides the system clock by 1, 4, 8, or 16. Taps off of this main
clocking chain drive circuitry that generates the slower clocks used by the pulse accu-
mulator, the real-time interrupt (RTI), and the computer operating properly (COP)
watchdog subsystems, also described in this section. Refer to Figure 9-1.
All main timer system activities are referenced to this free-running counter. The
counter begins incrementing from $0000 as the MCU comes out of reset, and contin-
ues to the maximum count, $FFFF. At the maximum count, the counter rolls over to
$0000, sets an overflow flag, and continues to increment. As long as the MCU is run-
ning in a normal operating mode, there is no way to reset, change, or interrupt the
counting. The capture/compare subsystem features three input capture channels, four
output compare channels, and one channel that can be selected to perform either in-
put capture or output compare. Each of the three input capture functions has its own
16-bit input capture register (time capture latch) and each of the output compare func-
tions has its own 16-bit compare register. All timer functions, including the timer over-
flow and RTI have their own interrupt controls and separate interrupt vectors.
The pulse accumulator contains an 8-bit counter and edge select logic. The pulse ac-
cumulator can operate in either event counting mode or gated time accumulation
mode. During event counting mode, the pulse accumulator's 8-bit counter increments
when a specified edge is detected on an input signal. During gated time accumulation
mode, an internal clock source increments the 8-bit counter while an input signal has
a predetermined logic level.
The real-time interrupt (RTI) is a programmable periodic interrupt circuit that permits
pacing the execution of software routines by selecting one of four interrupt rates.
The COP watchdog clock input (E
÷ 215) is tapped off of the free-running counter
chain. The COP automatically times out unless it is serviced within a specific time by
a program reset sequence. If the COP is allowed to time out, a reset is generated,
which drives the RESET pin low to reset the MCU and the external system. Refer to
Table 9-1 for crystal related frequencies and periods.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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