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參數(shù)資料
| 型號： | MC68HC11EA9VFN2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 58/58頁 |
| 文件大?。?/td> | 583K |
| 代理商： | MC68HC11EA9VFN2 |
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MC68HC11EA9
MOTOROLA
MC68HC11EA9TS/D
9
3.2.3 Index Register Y (IY)
The 16-bit IY register performs an indexed mode function similar to that of the IX register. However,
most instructions using the IY register require an extra byte of machine code and an extra cycle of ex-
ecution time because of the way the opcode map is implemented.
3.2.4 Stack Pointer (SP)
The M68HC11 CPU has an automatic program stack. This stack can be located anywhere in the ad-
dress space and can be any size up to the amount of memory available in the system. Normally the SP
is initialized by one of the first instructions in an application program. The stack is configured as a data
structure that grows downward from high memory to low memory. Each time a new byte is pushed onto
the stack, the SP is decremented. Each time a byte is pulled from the stack, the SP is incremented. At
any given time, the SP holds the 16-bit address of the next free location in the stack.
3.2.5 Program Counter (PC)
The program counter, a 16-bit register, contains the address of the next instruction to be executed. After
reset, the program counter is initialized from one of six possible vectors, depending on operating mode
and the cause of reset.
3.2.6 Condition Code Register (CCR)
This 8-bit register contains five condition code indicators (C, V, Z, N, and H), two interrupt masking bits,
(IRQ and XIRQ) and a stop disable bit (S). In the M68HC11 CPU, condition codes are automatically
updated by most instructions. For example, load accumulator A (LDAA) and store accumulator A
(STAA) instructions automatically set or clear the N, Z, and V condition code flags.
3.2.7 Addressing Modes
Six addressing modes can be used to access memory: immediate, direct, extended, indexed, inherent,
and relative. These modes are not detailed in this manual. For a complete description of the CPU reg-
isters, addressing modes, and instruction set refer to the
M68HC11 Reference Manual (M68HC11RM/
AD).
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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