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參數資料
| 型號： | MC68HC11EA9MFN2 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數： | 38/58頁 |
| 文件大?。?/td> | 583K |
| 代理商： | MC68HC11EA9MFN2 |
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MC68HC11EA9
MOTOROLA
MC68HC11EA9TS/D
43
Bits [7:4] can be written at any time. PR[1:0] can only be written once in the first 64 cycles after reset in
normal modes (SMOD = 0). In special modes (SMOD = 1) PR[1:0] can be written any time.
Bit 7 — Not Implemented
Always reads zero
PAEN — Pulse Accumulator Enable
Refer to 7.4 Pulse Accumulator
PAMOD — Pulse Accumulator Mode Select
Refer to 7.4 Pulse Accumulator
PEDGE — Pulse Accumulator Input Edge Select
Refer to 7.4 Pulse Accumulator
Bit 3 — Not Implemented
Always reads zero
I4/O5 — Input Capture 4/Output Compare 5 Select
Refer to 7.2 Main Timer
RTR[1:0] — Real-Time Interrupt Rate Select
7.4 Pulse Accumulator
M68HC11-family MCUs have an 8-bit counter within the timing system that can be configured for event
counting or for gated time accumulation. The counter (PACNT) can be read or written at any time.
The port A bit 7 I/O pin can be configured to act as a clock in event counting mode and edges on the
pulse accumulator input pin cause the counter (PACNT) to increment. When the pulse accumulator is
configured for time accumulation, an edge on the pulse accumulator input pin enables a free-running
clock (E divided by 64) that drives PACNT in gated time accumulation mode. Refer to Figure 10.
PACTL — Pulse Accumulator Control
$1026
BIT 7
654321
BIT 0
—
PAEN
PAMOD
PEDGE
—
I4/O5
RTR1
RTR0
RESET:
00000000
Table 21 Real-Time Interrupt Rates
Rate
RTI Rate Selected
RTR[1:0]
Selected
E = 1.0 MHz
E = 2.0 MHz
E = 3.0 MHz
0 0
213
÷ E
8.192 ms
4.096 ms
2.731 ms
0 1
214
÷ E
16.384 ms
8.192 ms
5.461 ms
1 0
215
÷ E
32.768 ms
16.384 ms
10.923 ms
1 1
216
÷ E
65.536 ms
32.768 ms
21.845 ms
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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