參數(shù)資料
型號： MC68HC08QY2CDTE
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO16
封裝： 0.65 MM PITCH, LEAD FREE, TSSOP-16
文件頁數(shù)： 174/176頁
文件大?。?/td> 1124K
代理商： MC68HC08QY2CDTE
MC68HC08QY/QT Family Data Sheet, Rev. 2
Freescale Semiconductor
97
Chapter 12
Input/Output Ports (PORTS)
12.1 Introduction
The MC68HC08QY1, MC68HC08QY2 and MC68HC08QY4 have thirteen bidirectional input-output (I/O)
pins and one input only pin. The MC68HC08QT1, MC68HC08QT2 and MC68HC08QT4 has five
bidirectional I/O pins and one input only pin. All I/O pins are programmable as inputs or outputs.
12.2 Unused Pin Termination
Input pins and I/O port pins that are not used in the application must be terminated. This prevents excess
current caused by floating inputs, and enhances immunity during noise or transient events. Termination
methods include:
1.
Configuring unused pins as outputs and driving high or low;
2.
Configuring unused pins as inputs and enabling internal pull-ups;
3.
Configuring unused pins as inputs and using external pull-up or pull-down resistors.
Never connect unused pins directly to VDD or VSS.
Since some general-purpose I/O pins are not available on all packages, these pins must be terminated
as well. Either method 1 or 2 above are appropriate.
12.3 Port A
Port A is an 6-bit special function port that shares its pins with the keyboard interrupt (KBI) module
(see Chapter 9 Keyboard Interrupt Module (KBI), the 2-channel timer interface module (TIM) (see
reset (RST) pin enabled using a configuration register (see Chapter 5 Configuration Register (CONFIG))
and the oscillator pins (see Chapter 11 Oscillator Module (OSC)).
Each port A pin also has a software configurable pullup device if the corresponding port pin is configured
as an input port.
NOTE
PTA2 is input only.
When the IRQ function is enabled in the configuration register 2
(CONFIG2), bit 2 of the port A data register (PTA) will always read a logic 0.
In this case, the BIH and BIL instructions can be used to read the logic level
on the PTA2 pin. When the IRQ function is disabled, these instructions will
behave as if the PTA2 pin is a logic 1. However, reading bit 2 of PTA will
read the actual logic level on the pin.
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