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參數(shù)資料
| 型號(hào)： | MC68HC08MR4 |
| 廠商： | Motorola, Inc. |
| 英文描述： | In-Circuit Simulator |
| 中文描述： | 在電路模擬器 |
| 文件頁(yè)數(shù)： | 92/100頁(yè) |
| 文件大?。?/td> | 506K |
| 代理商： | MC68HC08MR4 |
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User
’
s Manual
M68ICS08MR In-Circuit Simulator
92
Glossary
MOTOROLA
Glossary
MR32
—
MCU MC68HC908MR32.
MSB
—
Most significant bit.
N
—
Abbreviation for negative, a bit in the condition code register of the
HC08. In two
’
s-complement computer notation, positive signed
numbers have a 0 in their MSB (most significant bit) and negative
numbers have a 1 in their MSB. The N condition code bit reflects the
sign of the result of an operation. After a load accumulator instruction,
the N bit will be set if the MSB of the loaded value was a 1.
object code file
—
A text file containing numbers that represent the binary
opcodes and data of a computer program. An object code file can be
used to load binary information into a computer system. Motorola uses
the S-record file format for object code files.
operand
—
An input value to a logical or mathematical operation.
opcode
—
A binary code that instructs the CPU to do a specific operation in a
specific way. The HC08 CPU recognizes 210 unique 8-bit opcodes that
represent addressing mode variations of 62 basic instructions.
OTPROM
—
A non-volatile type of memory that can be programmed but
cannot be erased. An OTPROM is an EPROM MCU that is packaged in
an opaque plastic package. It is called a one-time-programmable MCU
because there is no way to expose the EPROM to a UV light.
PC
—
Abbreviation for program counter CPU register of the HC08.
PCBA
—
Printed circuit board assembly.
PLL
—
Phase-locked loop.
program counter
—
The CPU register that holds the address of the next
instruction or operand that the CPU will use.
QFP
—
Quad flat pack.
RAM
—
Random access memory. Any RAM location can be read or written
by the CPU. The contents of a RAM memory location remain valid
until the CPU writes a different value or until power is turned off.
registers
—
Memory locations that are wired directly into the CPU logic
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