參數(shù)資料
型號: MC68HC05C9EP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 124/144頁
文件大?。?/td> 1628K
代理商: MC68HC05C9EP
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Serial Communications Interface (SCI)
Advance Information
MC68HC05C9E
80
Serial Communications Interface (SCI)
MOTOROLA
If the receiver detects that a break (RDRF = 1, FE = 1, receiver data
register = $003B) produced the framing error, the start bit will not be
artificially induced and the receiver must actually detect a logic 1 before
the start bit can be recognized (see Figure 9-7).
Figure 9-7. SCI Start Bit Following a Break
9.11 Transmit Data Out (TDO)
Transmit data is the serial data from the internal data bus that is applied
through the SCI to the output line. Data format is as discussed in
9.7 Data Format and shown in Figure 9-3. The transmitter generates a
bit time by using a derivative of the RT clock, thus producing a
transmission rate equal to 1/16th that of the receiver sample clock.
9.12 SCI I/O Registers
These I/O registers control and monitor SCI operation:
SCI data register (SCDR)
SCI control register 1 (SCCR1)
SCI control register 2 (SCCR2)
SCI status register (SCSR)
EXPECTED STOP
DATA SAMPLES
DETECTED AS VALID START EDGE
START BIT
RDI
BREAK
START
QUALIFIERS
START EDGE
VERIFICATION
SAMPLES
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