參數(shù)資料
型號: MC68HC05C9ECFB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 109/144頁
文件大小: 1628K
代理商: MC68HC05C9ECFB
Capture/Compare Timer
Timer I/O Registers
MC68HC05C9E
Advance Information
MOTOROLA
Capture/Compare Timer
67
N
O
N-D
I
SC
L
O
SU
R
E
AG
R
EEMENT
R
E
Q
U
IR
ED
8.4.5 Input Capture Registers
When a selected edge occurs on the TCAP pin, the current high and low
bytes of the 16-bit counter are latched into the input capture registers.
Reading ICRH before reading ICRL inhibits further capture until ICRL is
read. Reading ICRL after reading the status register clears the input
capture flag (ICF). Writing to the input capture registers has no effect.
Figure 8-6. Input Capture Registers (ICRH and ICRL)
NOTE:
To prevent interrupts from occurring between readings of ICRH and
ICRL, set the interrupt flag in the condition code register before reading
ICRH, and clear the flag after reading ICRL.
Address:
$0014 — ICRH
Bit 7
6
54
32
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
Unaffected by reset
Address:
$0015 — ICRL
Bit 7
6
54
32
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
Unaffected by reset
= Unimplemented
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