參數(shù)資料
型號(hào)： MC68HC05C9AFN
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 146/160頁
文件大?。?/td> 4128K
代理商： MC68HC05C9AFN
NON-DISCLOSURE
AGREEMENT
REQUIRED
Serial Communications Interface (SCI)
General Release Specification
MC68HC05C9A — Rev. 4.0
Serial Communications Interface (SCI)
FE — Receiver Framing Error
This clearable, read-only flag is set when there is a logic zero where
a stop bit should be in the character shifted into the receive shift
register. If the received word causes both a framing error and an
overrun error, the OR flag is set and the FE flag is not set. Clear the
FE bit by reading the SCSR and then reading the SCDR.
1 = Framing error
0 = No framing error
9.14.5 Baud Rate Register (BAUD)
The baud rate register, shown in Figure 9-12, selects the baud rate for
both the receiver and the transmitter.
SCP1 — SCP0–SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator
clock, as shown in Table 9-1. Reset clears both SCP1 and SCP0.
$000D
Bit 7
6543
2
1
Bit 0
Read:
SCP1
SCP0
SCR2
SCR1
SCR0
Write:
Reset:
—
0
—
U
= Unimplemented
U = Undetermined
Figure 9-12. Baud Rate Register (BAUD)
Table 9-1. Baud Rate Generator
Clock Prescaling
SCP[1:0]
Baud Rate Generator Clock
00
Internal Clock
÷ 1
01
Internal Clock
÷ 3
10
Internal Clock
÷ 4
11
Internal Clock
÷ 13
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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