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參數(shù)資料
| 型號(hào)： | MC68EZ328 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Integrated Portable System Processor |
| 中文描述： | 集成便攜式系統(tǒng)處理器 |
| 文件頁(yè)數(shù)： | 6/8頁(yè) |
| 文件大?。?/td> | 103K |
| 代理商： | MC68EZ328 |
6
MC68EZ328 Product Brief
Low-Power Stop Logic
5
Serial Peripheral Interface (SPI)
The serial peripheral interface is a master mode, high-speed synchronous serial port for communicating to
external devices such as A/D converters and non-volatile RAMs. The interface is a 3 or 4 wire system
depending on unidirectional or bidirectional communication mode. This SPIM provides the clock for data
transfer and will function as a master-mode device.
6
Timer
The MC68EZ328 processor contains a general-purpose 16 bit timer with a programmable prescaler. This
timer also has input capture capability with programmable trigger edge and output compare. The resolution
is 240 ns when the system clock is 16.58 MHz.
7
Real Time Clock
The Real Time Clock in MC68EZ328 is driven by a 32.768kHz/38.4kHz Crystal which is the same as the Clock
Synthesizer clock source. It also provides interrupt for alarm. RTC also provides sampling capability. Users can
select from a predefined frequency and an interrupt will be generated accordingly. This sampling timer can be used
for digitizer sampling, or keyboard debouncing
.
8
LCD Controller
The LCD controller for the MC68EZ328 is similar to the original DragonBall LCD controller but has more
flexibility on grey level palette support and smaller screen size. Specific features are as follows:
Interfaces with Monochrome STN modules
Up to 4 Levels of Gray Scale out of 16 Palettes through Frame Rate Control
Utilize system RAM for display memory
Screen Refresh through DMA
Configurable Screen Size up to 640*512
LCD Contrast Control using 8-bit PWM
9
Pulse Width Modulation (PWM)
The pulse-width modulator (PWM) of the MC68EZ328 is optimized to generate high-quality sound from
stored sample audio images. This PWM has 8 bit resolution and contains a 5 byte FIFO which can
minimize interrupt overhead. A maskable interrupt is generated whenever there are 1 or 0 byte in the FIFO,
the software can then write either 4 byte samples or 2 two words sample into the FIFO, which can enhance
performance for audio applications.
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