參數(shù)資料
型號: MC68711D3CFBE2
廠商: Freescale Semiconductor
文件頁數(shù): 95/124頁
文件大小: 0K
描述: IC MCU 8BIT 44-QFP
標(biāo)準(zhǔn)包裝: 96
系列: HC11
核心處理器: HC11
芯體尺寸: 8-位
速度: 2MHz
連通性: SCI,SPI
外圍設(shè)備: POR,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: OTP
RAM 容量: 192 x 8
電壓 - 電源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-QFP
包裝: 托盤
SERIAL COMMUNICATIONS INTERFACE
7-6
TECHNICAL DATA
T8 — Transmit Data bit 8
If M bit is set, T8 stores ninth bit in transmit data character.
M — Mode (Select Character Format)
0 = Start bit, 8 data bits, 1 stop bit
1 = Start bit, 9 data bits, 1 stop bit
WAKE — Wake-up by Address Mark/Idle
0 = Wake-up by IDLE line recognition
1 = Wake-up by address mark (most significant data bit set)
7.6.3 Serial Communications Control Register 2 (SCCR2)
The SCCR2 register provides the control bits that enable or disable individual SCI
functions.
TIE — Transmit Interrupt Enable
0 = TDRE interrupts disabled
1 = SCI interrupt requested when TDRE status flag is set
TCIE — Transmit Complete Interrupt Enable
0 = TC interrupts disabled
1 = SCI interrupt requested when TC status flag is set
RIE — Receiver Interrupt Enable
0 = RDRF and OR interrupts disabled
1 = SCI interrupt requested when RDRF flag or the OR status flag is set
ILIE — Idle Line Interrupt Enable
0 = IDLE interrupts disabled
1 = SCI interrupt requested when IDLE status flag is set
TE — Transmitter Enable
When TE goes from zero to one, one unit of idle character time (logic one) is queued
as a preamble.
0 = Transmitter disabled
1 = Transmitter enabled
RE — Receiver Enable
0 = Receiver disabled
1 = Receiver enabled
RWU — Receiver Wake-Up Control
0 = Normal SCI receiver
1 = Wake-up enabled and receiver interrupts inhibited
SCCR2 — SCI Control Register 2
$002D
Bit 7
654321
Bit 0
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
RESET:
00000000
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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