參數(shù)資料
型號(hào)： MC68331VEH16
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 25/84頁(yè)
文件大?。?/td> 0K
描述： IC MCU 32BIT 16MHZ 132-PQFP
標(biāo)準(zhǔn)包裝： 36
系列： M683xx
核心處理器： CPU32
芯體尺寸： 32-位
速度： 16MHz
連通性： EBI/EMI，SCI，SPI，UART/USART
外圍設(shè)備： POR，PWM，WDT
輸入/輸出數(shù)： 18
程序存儲(chǔ)器類型： ROMless
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 132-BQFP 緩沖式
包裝： 托盤
MC68331TS/D
31
At reset, either the alternate function (01) or chip-select function (11) can be encoded. DATA pins are
driven to logic level one by a weak internal pull-up during reset. Encoding is for chip-select function un-
less a data line is held low during reset. Note that bus loading can overcome the weak pull-up and hold
pins low during reset. The following table shows the hierarchical selection method that determines the
reset functions of pins controlled by CSPAR1.
A pin programmed as a discrete output drives an external signal to the value specified in the port C pin
data register (PORTC), with the following exceptions:
A. No discrete output function is available on pins BR, BG, or BGACK.
B. ADDR23 provides E-clock output rather than a discrete output signal.
When a pin is programmed for discrete output or alternate function, internal chip-select logic still func-
tions and can be used to generate DSACK or AVEC internally on an address match.
Port size is determined when a pin is assigned as a chip select. When a pin is assigned to an 8-bit port,
the chip select is asserted at all addresses within the block range. If a pin is assigned to a 16-bit port,
the upper/lower byte field of the option register selects the byte with which the chip select is associated.
3.5.3 Base Address Registers
A base address is the starting address for the block enabled by a given chip select. Block size deter-
mines the extent of the block above the base address. Each chip select has an associated base register
so that an efficient address map can be constructed for each application. If a chip-select base address
register is programmed with the same address as a microcontroller module or memory array, an access
to that address goes to the module or array and the chip-select signal is not asserted.
BLKSZ —Block Size Field
This field determines the size of the block that must be enabled by the chip select. The following table
shows bit encoding for the base address registers block size field.
Table 15 Reset Pin Function of CS[10:6]
Data Bus Pins at Reset
Chip-Select/Address Bus Pin Function
DATA7
DATA6
DATA5
DATA4
DATA3
CS10/
ADDR23
CS9/
ADDR22
CS8/
ADDR21
CS7/
ADDR20
CS6/
ADDR19
11111
CS10
CS9
CS8
CS7
CS6
1111
0
CS10
CS9
CS8
CS7
ADDR19
111
0
X
CS10
CS9
CS8
ADDR20 ADDR19
11
0
X
CS10
CS9
ADDR21 ADDR20 ADDR19
1
0
X
CS10
ADDR22 ADDR21 ADDR20 ADDR19
0
XXXX
ADDR23 ADDR22 ADDR21 ADDR20 ADDR19
CSBARBT — Chip-Select Base Address Register Boot ROM
$YFFA48
15
14
13
12
11
10
9
8
7
6
5
4
3
2
0
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ
RESET:
0
1
CSBAR[10:0] —Chip-Select Base Address Registers
$YFFA4C–$YFFA74
15
14
13
12
11
10
9
8
7
6
5
4
3
2
0
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ
RESET:
0
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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