參數(shù)資料
型號(hào): MC68302FC20CR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP132
封裝: 0.950 X 0.950 INCH, 0.025 INCH PITCH, PLASTIC, QFP-132
文件頁數(shù): 103/128頁
文件大?。?/td> 641K
代理商: MC68302FC20CR2
Signal Descriptions
MOTOROLA
MC68EN302 REFERENCE MANUAL
5-9
5.5.3 TMS - JTAG Test Mode Select
This input controls test mode operation for the EN302 test logic as defined by the IEEE
1149.1 standard. This pin has an internal pullup resistor.
5.5.4 TDO - JTAG Test Data Out
This output is used in shifting serial test instructions and test data for on-board test logic
defined by the IEEE 1149.1 standard.
5.5.5 TDI - JTAG Test Data In
This input is used for shiftng serial test instructions and test data for on-board test logic
defined by the IEEE 1149.1 standard. This pin has an internal pullup resistor.
5.5.6 TCK- JTAG Clock
The JTAG clock runs at a frequency no greater than 10 MHz.
5.5.7 GND
Must be tied to GND in normal operation.TX
Ethernet MAC transmit data output.
5.5.8 TENA
Ethernet MAC transmit data valid output.
5.5.9 TCLK
Ethernet transmit clock input must be 10 MHz +/- 100 ppm according to the 802.3 spec.
5.5.10 RCLK
Ethernet receive clock input.
5.5.11 RX
Ethernet MAC receive data input.
5.5.12 RENA
This input indicates that the Ethernet MAC receive data is valid.
5.5.13 CLSN
This input pin indicates a collision (or SQE Test) was detected in the ethernet physical layer.
5.5.14 PARITY0/DISCPU
Parity is controlled by the PCSR register in the module bus controller. This bidirectional pin
provides even or odd parity for byte 0 (bit 15–bit 8) when not in the reset state.
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