
MOTOROLA
M68000 8-/16-/32-BIT MICROPROCESSORS USER’S MANUAL
6-7
Table 6-2. Exception Vector Assignment
Vectors Numbers
Address
Hex
0
Decimal
0
Dec
0
Hex
000
Space6
SP
Assignment
Reset: Initial SSP2
Reset: Initial PC2
Bus Error
Address Error
Illegal Instruction
Zero Divide
CHK Instruction
TRAPV Instruction
Privilege Violation
Trace
Line 1010 Emulator
Line 1111 Emulator
(Unassigned, Reserved)
1
1
4
004
SP
2
3
4
5
6
7
8
9
A
B
C
2
3
4
5
6
7
8
9
10
11
121
131
14
8
12
16
20
24
28
32
36
40
44
48
008
00C
010
014
018
01C
020
024
028
02C
030
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
D
52
034
SD
(Unassigned, Reserved)
Format Error5
Uninitialized Interrupt Vector
(Unassigned, Reserved)
E
56
038
SD
F
15
60
64
03C
040
SD
SD
10–17
16–231
92
96
05C
060
—
Spurious Interrupt3
Level 1 Interrupt Autovector
Level 2 Interrupt Autovector
Level 3 Interrupt Autovector
Level 4 Interrupt Autovector
Level 5 Interrupt Autovector
Level 6 Interrupt Autovector
Level 7 Interrupt Autovector
TRAP Instruction Vectors4
—
(Unassigned, Reserved)
18
24
SD
19
1A
1B
1C
1D
1E
1F
25
26
27
28
29
30
31
100
104
108
112
116
120
124
128
064
068
06C
070
074
078
07C
080
SD
SD
SD
SD
SD
SD
SD
SD
20–2F
32–47
188
192
0BC
0C0
30–3F
48–631
SD
255
256
1020
0FF
100
3FC
—
User Interrupt Vectors
—
40–FF
64–255
SD
NOTES:
1.
Vector numbers 12, 13, 16–23, and 48–63 are reserved for future
enhancements by Motorola. No user peripheral devices should be
assigned these numbers.
Reset vector (0) requires four words, unlike the other vectors which only
require two words, and is located in the supervisor program space.
The spurious interrupt vector is taken when there is a bus error
indication during interrupt processing.
TRAP #n uses vector number 32+ n.
MC68010 only. This vector is unassigned, reserved on the MC68000
and MC68008.
SP denotes supervisor program space, and SD denotes
supervisor data space.
2.
3.
4.
5.
6.