參數(shù)資料
型號： MC56F8323VFB60
廠商： Freescale Semiconductor
文件頁數(shù)： 53/140頁
文件大小： 0K
描述： IC MPU HYBRID DSP 32K 64-LQFP
標準包裝： 160
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 60MHz
連通性： CAN，SCI，SPI
外圍設(shè)備： POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 27
程序存儲器容量： 32KB（16K x 16）
程序存儲器類型： 閃存
RAM 容量： 12K x 8
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 64-LQFP
包裝： 托盤
配用： MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
56F8323 Technical Data, Rev. 17
2
Freescale Semiconductor
Preliminary
Document Revision History
Version History
Description of Change
Rev 1.0
Pre-Release version, Alpha customers only
Rev 2.0
Initial Public Release
Rev 3.0
Corrected typo in Table 10-4, Flash Endurance is 10,000 cycles. Addressed additional grammar
issues.
Rev 4.0
Added Package Pins to GPIO Table in Section 8. Removed reference to pin group 9 in Table 10-5.
Replacing TBD Typical Min with values in Table 10-17. Editing grammar, spelling, consistency of
language throughout family. Updated values in Regulator Parameters, Table 10-9, External Clock
Operation Timing Requirements Table 10-13, SPI Timing, Table 10-18, ADC Parameters,
Table 10-24, and IO Loading Coefficients at 10MHz, Table 10-25.
Rev 5.0
Updated values in Power-On Reset Low Voltage, Table 10-6.
Rev 6.0
Correcting package pin numbers in Table 2-2, PhaseA0 changed from 38 to 52, PhaseB0 changed
from 37 to 51, Index0 changed from 36 to 50, and Home0 changed from 35 to 49. All pin changes in
Table 2-2 were do to data entry errors - This package pin-out has not changed
Rev 7.0
Added Part 4.8, added addition text to Part 6.9 on POR reset, added the word “access” to FM Error
Interrupt in Table 4-3, removed min and max numbers; only documenting Typ. numbers for LVI in
Rev 8.0
Updated numbers in Table 10-7 and Table 10-8 with more recent data. Corrected typo in Table 10-3 in
Pd characteristics.
Rev 9.0
Replace any reference to Flash Interface Unit with Flash Memory Module; changed example in Part
2.2; added note on VREFH and VREFLO in Table 2-2 and Table 11-1; added note to Vcap pin in
Table 2-2; corrected typo FIVAL1 and FIVAH1 in Table 4-12; removed unneccessary notes in
Table 10-12; corrected temperature range in Table 10-14; added ADC calibration information to
Table 10-24 and new graphs in Figure 10-21.
Rev 10.0
Clarification to Table 10-23, corrected Digital Input Current Low (pull-up enabled) numbers in
Table 10-5. Removed text and Table 10-2; replaced with note to Table 10-1.
Rev. 11.0
Added 56F8123 information; edited to indicate differences in 56F8323 and 56F8123.Reformatted for
Freescale look and feel. Updated Temperature Sensor and ADC tables, then updated balance of
electrical tables for consistency throughout the family. Clarified I/O power description in Table 2-2,
added note to Table 10-7 and clarified Section 12.3 .
Rev 12.0
Added output voltage maximum value and note to clarify in Table 10-1; also removed overall life
expectancy note, since life expectancy is dependent on customer usage and must be determined by
reliability engineering. Clarified value and unit measure for Maximum allowed PD in Table 10-3.
Corrected note about average value for Flash Data Retention in Table 10-4. Added new
RoHS-compliant orderable part numbers in Table 13-1.
Rev 13.0
Deleted formula for Max Ambient Operating Temperature (Automotive) and Max Ambient Operating
Temperature (Industrial) in Table 10-4. Added RoHS-compliance and “pb-free” language to back
cover.
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