參數(shù)資料
型號(hào)： MC56F8323VFB60
廠商： Freescale Semiconductor
文件頁數(shù)： 52/140頁
文件大?。?/td> 0K
描述： IC MPU HYBRID DSP 32K 64-LQFP
標(biāo)準(zhǔn)包裝： 160
系列： 56F8xxx
核心處理器： 56800E
芯體尺寸： 16-位
速度： 60MHz
連通性： CAN，SCI，SPI
外圍設(shè)備： POR，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 27
程序存儲(chǔ)器容量： 32KB（16K x 16）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 12K x 8
電壓 - 電源 (Vcc/Vdd)： 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 8x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 64-LQFP
包裝： 托盤
配用： MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
Signal Pins
56F8323 Technical Data, Rev. 17
Freescale Semiconductor
19
Preliminary
2.2 Signal Pins
After reset, each pin is configured for its primary function (listed first). In the 56F8123, after reset, each
pin must be configured for the desired function. The initialization software will configure each pin for the
function listed first for each pin, as shown in Table 2-2. Any alternate functionality must be programmed.
Note: Signals in italics are not available in the 56F8123 device.
If the “State During Reset” lists more than one state for a pin, the first state is the actual reset state. Other
states show the reset condition of the alternate function, which you get if the alternate pin function is
selected without changing the configuration of the alternate peripheral. For example, the SCLK0/GPIOB3
pin shows that it is tri-stated during reset. If the GPIOB_PER is changed to select the GPIO function of
the pin, it will become an input if no other registers are changed.
Table 2-2 Signal and Package Information for the 64-Pin LQFP
Signal Name
Pin No.
Type
State During
Reset
Signal Description
VDD_IO
6
Supply
I/O Power — This pin supplies 3.3V power to the chip I/O interface
and also the Processor core throught the on-chip voltage regulator, if
it is enabled.
VDD_IO
20
VDD_IO
48
VDD_IO
59
VDDA_OSC_PLL
42
Supply
Oscillator and PLL Power — This pin supplies 3.3V power to the
OSC and to the internal regulator that in turn supplies the Phase
Locked Loop. It must be connected to a clean analog power supply.
VDDA_ADC
41
Supply
ADC Power — This pin supplies 3.3V power to the ADC modules. It
must be connected to a clean analog power supply.
VSS
11
Supply
Ground — These pins provide ground for chip logic and I/O drivers.
VSS
17
VSS
44
VSS
60
VSSA_ADC
39
Supply
ADC Analog Ground — This pin supplies an analog ground to the
ADC modules.
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