VREFP 28 Input/ Output Analog In" />
參數(shù)資料
型號: MC56F8322VFAER2
廠商: Freescale Semiconductor
文件頁數(shù): 56/136頁
文件大小: 0K
描述: IC HYBRID CTRLR 16BIT 48-LQFP
標(biāo)準(zhǔn)包裝: 2,000
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 60MHz
連通性: CAN,SCI,SPI
外圍設(shè)備: POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 21
程序存儲器容量: 40KB(20K x 16)
程序存儲器類型: 閃存
RAM 容量: 6K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 48-LQFP
包裝: 帶卷 (TR)
配用: MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
56F8322 Techncial Data, Rev. 16
26
Freescale Semiconductor
Preliminary
VREFP
28
Input/
Output
Analog Input/
Output
VREFP, VREFMID & VREFN — Internal pins for voltage reference which
are brought off-chip so that they can be bypassed. Connect to a 0.1
μF
ceramic low ESR capacitor.
VREFMID
27
VREFN
26
CAN_RX
(GPIOC2)
46
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
FlexCAN Receive Data — This is the CAN input. This pin has an
internal pull-up resistor.
Port C GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is CAN_RX.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
CAN_TX
(GPIOC3)
47
Open
Drain
Output
Schmitt
Input/
Output
Open
Drain
Output
FlexCAN Transmit Data — CAN output with internal pull-up enable
at reset.*
* Note: If a pin is configured as open drain output mode, internal
pull-up will automatically be disabled when it outputs low. Internal
pull-up will be enabled unless it has been manually disabled by
clearing the corresponding bit in the PUREN register of the GPIO
module, when it outputs high.
If a pin is configured as push-pull output mode, internal pull-up will
automatically be disabled, whether it outputs low or high.
Port C GPIO — This GPIO pin can be individually programmed as an
input or output pin.
In the 56F8322, the default state after reset is CAN_TX.
In the 56F8122, the default state is not one of the functions offered
and must be reconfigured.
TC0
(TXD0)
(GPIOC6)
1Schmitt
Input/
Output
Schmitt
Input
Schmitt
Input/
Output
Input,
pull-up
enabled
TC0 — Timer C, Channel 0
Transmit Data — SCI0 transmit data output
Port C GPIO — This GPIO pin can be individually programmed as an
input or output pin.
After reset, the default state is TC0.
Table 2-2 Signal and Package Information for the 48-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State During
Reset
Signal Description
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參數(shù)描述
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MC56F8323EVM 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F832X Dev Kit RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MC56F8323EVM 制造商:Freescale Semiconductor 功能描述:Tools Development kit Kit Con
MC56F8323EVME 功能描述:開發(fā)板和工具包 - 其他處理器 MC56F8323 EVAL BRD RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓:
MC56F8323EVME 制造商:Freescale Semiconductor 功能描述:Evaluation Kit for MC56F832x and MC56F81