參數(shù)資料
型號: MC56F8156VFVE
廠商: Freescale Semiconductor
文件頁數(shù): 95/178頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 40MHZ 144-LQFP
標準包裝: 60
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 40MHz
連通性: EBI/EMI,SCI,SPI
外圍設備: POR,PWM,WDT
輸入/輸出數(shù): 62
程序存儲器容量: 256KB(128K x 16)
程序存儲器類型: 閃存
RAM 容量: 8K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 105°C
封裝/外殼: 144-LQFP
包裝: 托盤
Signal Pins
56F8356 Technical Data, Rev. 13
Freescale Semiconductor
23
Preliminary
D7
(GPIOF0)
28
Input/
Output
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
Data Bus — D7 - D14 specify part of the data for external program
or data memory accesses.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port F GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
At reset, these pins default to Data Bus functionality.
To deactivate the internal pull-up resistor, clear the appropriate
GPIO bit in the GPIOF_PUR register.
Example: GPIOF0, clear bit 0 in the GPIOF_PUR register.
D8
(GPIOF1)
29
D9
(GPIOF2)
30
D10
(GPIOF3)
32
D11
(GPIOF4)
133
D12
(GPIOF5)
134
D13
(GPIOF6)
135
D14
(GPIOF7)
136
D15
(GPIOF8)
137
Input/
Output
Input/
Output
In reset,
output is
disabled,
pull-up is
enabled
Data Bus — D15 specifies part of the data for external program or
data memory accesses.
Most designs will want to change the DRV state to DRV = 1 instead of
using the default setting.
Port F GPIO — This GPIO pin can be individually programmed as
an input or output pin.
At reset, this pin defaults to the Data Bus function.
To deactivate the internal pull-up resistor, clear bit 8 in the
GPIOF_PUR register.
Table 2-2 Signal and Package Information for the 144-Pin LQFP (Continued)
Signal Name
Pin No.
Type
State
During
Reset
Signal Description
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