參數資料
型號： MC56F8146VFV
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 數字信號處理
英文描述： 16-BIT, 120 MHz, OTHER DSP, PQFP144
封裝： LQFP-144
文件頁數： 15/178頁
文件大?。?/td> 880K
代理商： MC56F8146VFV
Operating Modes
56F8346 Technical Data, Rev. 15
Freescale Semiconductor
111
Preliminary
6.3 Operating Modes
Since the SIM is responsible for distributing clocks and resets across the chip, it must understand the
various chip operating modes and take appropriate action. These are:
Reset Mode, which has two submodes:
— POR and RESET operation
The 56800E core and all peripherals are reset. This occurs when the internal POR is asserted or the
RESET pin is asserted.
— COP reset and software reset operation
The 56800E core and all peripherals are reset. The MA bit within the OMR is not changed. This allows
the software to determine the boot mode (internal or external boot) to be used on the next reset.
Run Mode
This is the primary mode of operation for this device. In this mode, the 56800E controls chip operation.
Debug Mode
The 56800E is controlled via JTAG/EOnCE when in debug mode. All peripherals, except the COP and
PWMs, continue to run. COP is disabled and PWM outputs are optionally switched off to disable any motor
from being driven; see the PWM chapter in the 56F8300 Peripheral User Manual for details.
Wait Mode
In Wait mode, the core clock and memory clocks are disabled. Optionally, the COP can be stopped.
Similarly, it is an option to switch off PWM outputs to disable any motor from being driven. All other
peripherals continue to run.
Stop Mode
When in Stop mode, the 56800E core, memory, and most peripheral clocks are shut down. Optionally, the
COP and CAN can be stopped. For lowest power consumption in Stop mode, the PLL can be shut down.
This must be done explicitly before entering Stop mode, since there is no automatic mechanism for this. The
CAN (along with any non-gated interrupt) is capable of waking the chip up from Stop mode, but is not fully
functional in Stop mode.
6.4 Operating Mode Register
Figure 6-1 OMR
The reset state for MB and MA will depend on the Flash secured state. See Part 4.2 and Part 7 for detailed
information on how the Operating Mode Register (OMR) MA and MB bits operate in this device. For all
other bits, see the DSP56800E Reference Manual.
Note:
The OMR is not a Memory Map register; it is directly accessible in code through the acronym OMR.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NL
CM
XP
SD
R
SA
EX
0
MB
MA
Type
R/W
RESET
0
0000
0
X
相關PDF資料
PDF描述
MC56F8167VPYE 16-BIT, 120 MHz, OTHER DSP, PQFP160
MC56F8367VVFE 16-BIT, 120 MHz, OTHER DSP, PBGA160
MC56F8367VVF 16-BIT, 120 MHz, OTHER DSP, PBGA160
MC56F8367MPYE 16-BIT, 120 MHz, OTHER DSP, PQFP160
MC56F8167VPY 16-BIT, 120 MHz, OTHER DSP, PQFP160
相關代理商/技術參數
參數描述
MC56F8146VFVE 功能描述:數字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8147 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:16-bit Digital Signal Controllers
MC56F8147VPY 制造商:Motorola Inc 功能描述: 制造商:MOTOROLA 功能描述:
MC56F8147VPYE 功能描述:數字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT
MC56F8147VVFE 功能描述:IC DGTL SIGNAL CTLR 160-MAPBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:56F8xxx 標準包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設備:- 輸入/輸出數:32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數據轉換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285
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