參數(shù)資料
型號: MC56F8145VFGE
廠商: Freescale Semiconductor
文件頁數(shù): 16/172頁
文件大?。?/td> 0K
描述: IC DSP 16BIT 40MHZ 128-LQFP
標(biāo)準(zhǔn)包裝: 72
系列: 56F8xxx
核心處理器: 56800E
芯體尺寸: 16-位
速度: 40MHz
連通性: EBI/EMI,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 49
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
RAM 容量: 4K x 16
電壓 - 電源 (Vcc/Vdd): 2.25 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b
振蕩器型: 外部
工作溫度: -40°C ~ 105°C
封裝/外殼: 128-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 734 (CN2011-ZH PDF)
56F8345 Technical Data, Rev. 17
112
Freescale Semiconductor
Preliminary
6.5.6.14
Reserved—Bit 2–0
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.7
CLKO Select Register (SIM_CLKOSR)
The CLKO select register can be used to multiplex out any one of the clocks generated inside the clock
generation and SIM modules. The default value is SYS_CLK. This path has been optimized in order to
minimize any delay and clock duty cycle distortion. All other clocks primarily muxed out are for test
purposes only, and are subject to significant phase shift at high frequencies.
The upper four bits of the GPIOB register can function as GPIO, [A23:A20], or as additional clock output
signals. GPIO has priority and is enabled/disabled via the GPIOB_PER. If GPIOB[7:4] are programmed
to operate as peripheral outputs, then the choice between [A23:A20] and additional clock outputs is done
here in the CLKOSR. The default state is for the peripheral function of GPIOB[7:4] to be programmed as
[A23:A20]. This can be changed by altering [A23:A20], as shown in Figure 6-9.
Figure 6-9 CLKO Select Register (SIM_CLKOSR)
6.5.7.1
Reserved—Bits 15–10
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
6.5.7.2
Alternate GPIO_B Peripheral Function for A23 (A23)—Bit 9
0 = Peripheral output function of GPIOB[7] is defined to be A[23]
1 = Peripheral output function of GPIOB[7] is defined to be the oscillator clock (MSTR_OSC, see
6.5.7.3
Alternate GPIO_B Peripheral Function for A22 (A22)—Bit 8
0 = Peripheral output function of GPIOB[6] is defined to be A[22]
1 = Peripheral output function of GPIOB[6] is defined to be SYS_CLK2
6.5.7.4
Alternate GPIO_B Peripheral Function for A21 (A21)—Bit 7
0 = Peripheral output function of GPIOB[5] is defined to be A[21]
1 = Peripheral output function of GPIOB[5] is defined to be SYS_CLK
6.5.7.5
Alternate GPIO_B Peripheral Function for A20 (A20)—Bit 6
0 = Peripheral output function of GPIOB[4] is defined to be A[20]
1 = Peripheral output function of GPIOB[4] is defined to be the prescaler clock (FREF, see Figure 3-4)
Base + $A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Read
0
A23
A22
A21
A20
CLK
DIS
CLKOSEL
Write
RESET
0
001
0
000
0
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MC56F8146VFVE 功能描述:數(shù)字信號處理器和控制器 - DSP, DSC 16 BIT HYBRID CONTROLLER RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
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