參數(shù)資料
型號(hào): MC56F8145VFG
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 數(shù)字信號(hào)處理
英文描述: 4-BIT, 120 MHz, OTHER DSP, PQFP128
封裝: PLASTIC, LQFP-128
文件頁數(shù): 93/172頁
文件大小: 871K
代理商: MC56F8145VFG
Signal Pins
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
27
Preliminary
INDEX0
(TA2)
(GPIOC6)
1Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
Index — Quadrature Decoder 0, INDEX input
TA2 — Timer A, Channel 2
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is INDEX0.
To deactivate the internal pull-up resistor, clear bit 6 of the
GPIOC_PUR register.
HOME0
(TA3)
(GPIOC7)
2Schmitt
Input
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
Home — Quadrature Decoder 0, HOME input
TA3 — Timer A ,Channel 3
Port C GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is HOME0.
To deactivate the internal pull-up resistor, clear bit 7 of the
GPIOC_PUR register.
SCLK0
(GPIOE4)
124
Schmitt
Input/
Output
Schmitt
Input/
Output
Input,
pull-up
enabled
SPI 0 Serial Clock — In the master mode, this pin serves as an
output, clocking slaved listeners. In slave mode, this pin serves
as the data clock input.
Port E GPIO — This GPIO pin can be individually programmed
as an input or output pin.
After reset, the default state is SCLK0.
To deactivate the internal pull-up resistor, clear bit 4 in the
GPIOE_PUR register.
Table 2-2 Signal and Package Information for the 128-Pin LQFP
Signal
Name
Pin No.
Type
State
During
Reset
Signal Description
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