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參數(shù)資料
| 型號： | MC54-74HC393A |
| 廠商： | Motorola, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual 4-Stage Binary Ripple Counter |
| 中文描述： | 雙4位的二進制紋波計數(shù)器 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大小： | 240K |
| 代理商： | MC54-74HC393A |
MC54/74HC393A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
0.1
0.1
0.1
4.5
|Iout|
20
μ
A
Voltage
5.2 mA
0.26
0.33
0.40
Iin
ICC
Maximum Input Leakage Current
Vin = VCC or GND
Vin = VCC or GND
|Iout|
6.0
6.0
±
0.1
±
1.0
±
1.0
μ
A
Maximum Quiescent Supply
6.0
4
160
μ
A
40
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
Guaranteed Limit
VCC
– 55 to
4.5
30
4.5
20
28
25
30
(Figures 1 and 3)
3.0
4.5
56
32
25
100
45
(Figures 1 and 3)
3.0
40
70
38
65
(Figures 1 and 3)
3.0
160
185
55
210
(Figures 2 and 3)
3.0
48
75
tTHL
(Figures 1 and 3)
3.0
27
65
36
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
32
CPD
Power Dissipation Capacitance (Per Counter)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
35
pF
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