參數(shù)資料
型號(hào): MC33976
廠(chǎng)商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: Dual Gauge Driver with Configurable Response Time(帶可設(shè)置響應(yīng)時(shí)間的雙標(biāo)尺驅(qū)動(dòng)器)
中文描述: 雙計(jì)驅(qū)動(dòng)器,可配置的響應(yīng)時(shí)間(帶可設(shè)置響應(yīng)時(shí)間的雙標(biāo)尺驅(qū)動(dòng)器)
文件頁(yè)數(shù): 24/40頁(yè)
文件大?。?/td> 5332K
代理商: MC33976
Analog Integrated Circuit Device Data
Freescale Semiconductor
24
33976
FUNCTIONAL DEVICE OPERATION
COMMUNICATION MEMORY MAPS AND REGISTER DESCRIPTIONS
CMD0 (OD12) — This bit indicates whether Gauge 0 is at
the most recently commanded position.
0 = At commanded position
1 = Not at commanded position
POS11:POS0 (OD11:OD0) — These 12 bits represent the
actual position of the pointer at the time
CS
transitions to a
logic [0].
Gauge 1 Pointer Position Status Information
Most recent valid PECCR command resulting in the
Gauge 1 Pointer Velocity status output:
The bits in
Table 26
are
read-only
bits.
ENB1 (OD15) — This bit indicates if Gauge 1 is enabled.
0 = Disabled
1 = Enabled
DIR1 (OD14) — This bit indicates the direction Gauge 1
pointer is moving.
0 = Toward position 0
1 = Away from position 0
DIRC1 (OD13) — This bit determines if the direction of the
most recent pointer movement is toward, or away from, the
last commanded position.
0 = Direction of the pointer movement is toward the
commanded position
1 = Direction of the pointer movement is away from the
commanded position
CMD1 (OD12) — This bit indicates if Gauge 1 is at the most
recently commanded position.
0 = At commanded position
1 = Not at commanded position
POS11:POS0 (OD11:OD0) — These 12 bits represent the
actual position of the pointer at the time
CS
transitions to a
logic [0].
Gauge 0 and 1 Pointer Velocity Status Information
Most recent valid PECCR command resulting in the
Gauge 0 and 1 Pointer Velocity status output:
The bits in
Table 28
are
read-only
bits.
1V7:1V0 (OD15:OD8) — These 8 bits represent the step
table value that indicates the actual velocity step location
(refer to
Table 30
, page
27
) of the Gauge 1 pointer at the
time that the
CS
transitions to a logic [0].
Note
For both sets of bits,1V7:1V0 and 0V7:0V0, if the
ramp is truncated with the RMPSELR, the velocity position
step that will be read when the pointer is no longer moving will
be the velocity position that identifies it in the untruncated
ramp (e.g., if RS = 2, then the velocity step location will be 3
when the pointer is at the commanded position).
0V7:0V0 (OD7:OD0) — These 8 bits represent the step
table value that indicates the actual velocity step location
(refer to
Table 30
) of the Gauge 0 pointer at the time that the
CS
transitions to a logic [0].
Table 25.
D11
D10
D9
D8
1
1
0
1
Table 26. Gauge 1 Pointer Position Status Output Register
Bits
OD15
OD14
OD13
OD12
OD11
OD10
OD9
OD8
OD7
OD6
OD5
OD4
OD3
OD2
OD1
OD0
Read
ENB1
DIR1
DIRC1 CMD1 POS11 POS10 POS9
POS8
POS7
POS6
POS5
POS4
POS3
POS2
POS1
POS0
Write
Table 27.
D11
D10
D9
D8
1
1
1
x
x = Don’t care.
Table 28. Gauge 0 and 1 Pointer Velocity Status Output Register
Bits
OD15
OD14
OD13
OD12
OD11
OD10
OD9
OD8
OD7
OD6
OD5
OD4
OD3
OD21
OD1
OD0
Read
1V7
1V6
1V5
1V4
1V3
1V2
1V1
1V0
0V7
0V6
0V5
0V4
0V3
0V2
0V1
0V0
Write
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