OPERATIONAL MODES MCU FLASH PROGRAMMING CON" />
參數(shù)資料
型號(hào): MC33742EPR2
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 30/71頁(yè)
文件大小: 0K
描述: IC SYSTEM BASE W/CAN 48-QFN
標(biāo)準(zhǔn)包裝: 2,000
應(yīng)用: 自動(dòng)
接口: SPI
電源電壓: 5.5 V ~ 18 V
封裝/外殼: 48-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 48-QFN-EP(7x7)
包裝: 帶卷 (TR)
安裝類型: 表面貼裝
Analog Integrated Circuit Device Data
36
Freescale Semiconductor
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
MCU FLASH PROGRAMMING CONFIGURATION
To allow for new software to be loaded into a SBC’s MCU NVM or to standalone EEPROM or Flash, the 33742 is capable of
having (1) VSUP applied to it to from an external power 5.0 V supply and (2) having the RST and the WDOG outputs pins
eternally forced to 0.0 or 5.0 V without damaging the device.
This allows the SBC to be externally powered and off-board signals to be applied to the reset pins. No functions of the 33742
are operating. Figure 18 illustrates a typical configuration for the connection of programming and debugging tools.
The VSUP should be left open or forced to a value equal to or above V.
The VDD regulator uses an internal pass transistor between VSUP and the VDD output pin. Biasing the VDD output pin with
a voltage greater than VDD potential will force current through the body diode of the internal pass transistor to the VSUP pin.
The RST pin is periodically pulled LOW for the tRSTDUR time (device in Reset mode), before being pulled to VDD for 350 ms
typical (device in Normal Request mode). During the time reset is LOW, the RST pin sinks 5.0 mA maximum (IPDW).
Figure 18. Simplified Schematic for Microcontroller Flash Programming
33742
MCU with
VDD
RST
WDOG
VSUP (Open or > 5.0 V
Programming Bus
Note External supply and sources applied to VDD, RST, and WDOG test points on application circuit board.
5.0 V
Programming Tool
Flash Memory
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