參數(shù)資料
型號(hào)： MC33567D-1G
廠商： ON Semiconductor
文件頁(yè)數(shù)： 4/12頁(yè)
文件大?。?/td> 88K
描述： IC REG CTRLR DUAL OUT 8-SOIC
產(chǎn)品變化通告： Product Obsolescence 13/Apr/2009
標(biāo)準(zhǔn)包裝： 98
類型： 正，固定式
輸出數(shù)： 2
輸出電壓： 1.52V，1.82V
電流 - 電源： 6.3mA
輸入電壓： 9 V ~ 12.5 V
工作溫度： 0°C ~ 80°C
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOICN
包裝： 管件
MC33567
http://onsemi.com
4
OPERATING DESCRIPTION
Introduction
The MC33567 series is a family of Dual Linear FET
Controllers designed for Power Management applications
where high current, voltage regulation is needed. Some
computer applications include:
" 1.2 V  Power Supply
" 1.515 V  AGP (Advanced Graphic Port) and GTL+
(Gunning Transistor Logic  Intels electrical bus
technology)
" 1.818 V  I/O planes on motherboards
" 2.3 V  Power Supply
" 2.525 V  Clock and memory
The MC33567 provides tight output voltage regulation,
(V
out
), and incorporates individual SHDN
 controls for each
FET controller and voltage protection by sensing the output
voltage.
Output:
The MC33567 provides tight output voltage regulation
from one or two supply voltages using 2 external NChannel
MOSFETs. Each controller operates independently and
regulates the output voltage to a predetermined level (1.2 V,
1.515 V 1.818 V, 2.3 V or 2.525 V). In addition, regulator 2
of the MC335671 incorporates a V
in
 bypass mode on which
the external FET is fully enhanced.
Shutdown:
The regulated outputs of the MC33567 can be disabled
with the use of the SHDN
 pin. It also determines the output
voltage level. SHDN
  can be controlled externally from
board signals like the AGP or GTL+ as shown in Figure 3.
Figure 3. 1.5 V/3.3 V AGP Card Detection
*V
in
 while on bypass mode (MC335671 only)
1
2
3
4
8
7
6
5
MC33567
DRV2
SENSE2
3.3 V
AGP
Card Type
Detection
AGP
Card
Voltage
V
out
 or V
in
*
12 V (V
CC
)
3.3 V (V
in
)
SHDN2
10 kW
Listed below are the SHDN
 threshold voltage levels and
the corresponding regulator output voltages:
1. If the SHDN
 pin is left open, the output voltage is set
to its regulated value.
2. If a voltage less than 0.8 V is applied to the SHDN
 pin,
the output voltage is set to 0 V.
3. If a voltage greater than 1.3 V and less than 4.1 V is
applied to the SHDN
 pin, the output voltage is set to its
regulated voltage.
4. If the SHDN
  voltage is pulled above 4.1 V, the
MC33567 enters a V
in
 bypass mode. In this mode, the
MOSFET is fully enhanced and the output voltage is
the MOSFET drain voltage (V
in
) minus the MOSFET
drainsource on voltage V
DS(on)
. This feature is only
available on REGULATOR 2 of the MC335671.
Table 1 summarizes the output voltage options and its
relationship with V
SHDN
.
Table 1. Logic Table for SHDN
 Pin
Device
V
SHDN
 (V)
V
out
 (V)
MC335671
REGULATOR 1
No Connect
t0.8 V
u1.3 V
1.818 V
0 V
1.818 V
REGULATOR 2
No Connect
t0.8 V
1.3 V t V
SHDN
 t 4.1 V
u 4.1 V
1.515 V
0 V
1.515 V
V
in
V
DS(on)
(Bypass
 
Mode)
MC335672
REGULATOR 1 &
REGULATOR 2
No Connect
t0.8 V
u1.3 V
2.525 V
0 V
2.525 V
MC335673
REGULATOR 1
No Connect
t0.8 V
u1.3 V
2.3 V
0 V
2.3 V
REGULATOR 2
No Connect
t0.8 V
u 1.3 V
1.2 V
0 V
1.2 V
Undervoltage Detection:
If V
out
 drops below 75% of the regulated threshold for
greater than 250 祍 or a short circuit condition is present, that
output will go into short circuit or Hiccup Mode. While in
Hiccup mode, the output is turned ON for 1.0 ms and OFF
for 40 ms for a duty cycle of 1:41 as shown in Figure 4. This
mode will continue as long as the fault is present. Once the
fault is removed, the regulator will resume normal
operation.
40 ms
1 ms
Figure 4. Hiccup Mode Duty Cycle
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MC33567D-3R2 功能描述:低壓差控制器 - LDO Dual 2.5V Output RoHS:否 制造商:Micrel 最大輸入電壓:5.5 V 輸出電壓:Adjustable 輸出電流:10 mA 負(fù)載調(diào)節(jié): 輸出類型:Adjustable, Fixed 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOT-23-6
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