ELECTRICAL CHARACTERISTICS (continued) (All parameters are specified " />
參數(shù)資料
型號： MC33215BE
廠商： Freescale Semiconductor
文件頁數(shù)： 16/20頁
文件大?。?/td> 0K
描述： IC SPEAKERPHONE CIRCUIT 42-SDIP
標(biāo)準(zhǔn)包裝： 13
功能： 語音切換式揚聲電話
電路數(shù)： 1
工作溫度： -20°C ~ 70°C
安裝類型： 通孔
封裝/外殼： 42-SDIP（0.600"，15.24mm）
供應(yīng)商設(shè)備封裝： 42-PSDIP
包裝： 管件
MC33215
5
MOTOROLA ANALOG IC DEVICE DATA
ELECTRICAL CHARACTERISTICS (continued) (All parameters are specified at T = 25
°C, Iline = 18 mA, VLS = 2.9 V, f = 1000 Hz,
PRS = high, MUT = high, SPS = low, LSM = high, test figure in Figure 17 with S1 in position 1, unless otherwise stated.)
Characteristic
Unit
Max
Typ
Min
Rx CHANNEL, LOUDSPEAKER PRE–AMPLIFIER (SPS = HIGH, Rx MODE FORCED)
Voltage Gain from VRXI to VRLS (Note 2)
21
24
27
dB
Vline = 20 mVrms
Gain Reduction in Mute Condition
60
–
–
dB
SPS = Low or MUT = Low
Rx CHANNEL, LOUDSPEAKER AMPLIFIER
Voltage Gain from VLSI to VLSP
25
26
27
dB
VLSI = 10 mVrms
Attenuation at Delta RVOL = 47 k
–
32
–
dB
Psophometrically Weighted Noise Level at VLSP
–
1.2
–
mVrms
RXI Shorted to Gnd via 10
F
Confidence Level During DTMF Dialing
150
200
250
mVrms
VMF = 7.5 mVrms MUT = Low
Available Peak Current from LSO
110
–
–
mApeak
Output Capability into 25
1.8
–
–
Vpp
THD
≤2%, VLSI = 55 mVrms
Output Capability into 25
2.7
–
–
Vpp
THD
≤2%, VLS = 5.0 V, VLSI = 90 mVrms
Gain Reduction in Mute Condition
60
–
–
dB
LSM = Low
Rx CHANNEL PEAK–TO–PEAK LIMITER
Peak–to–Peak Limiter Attack Time
–
–
5.0
ms
VLSI Jumps from 40 mVrms to 120 mVrms
Peak–to–Peak Limiter Release Time
–
300
–
ms
VLSI Jumps from 120 mVrms to 40 mVrms
THD at 10 dB Overdrive
–
–
7.0
%
VLSI = 120 mVrms
Peak–to–Peak Limiter Disable Threshold at PPL
–
–
0.1
V
AUTOMATIC GAIN CONTROL
Gain Reduction in Transmit and Receive Channel with Respect to Iline = 18 mA
4.5
6.0
7.5
dB
Iline = 70 mA
Gain Variation in Transmit and Receive Channel with Respect to Iline =18 mA with
AGC Disabled (AGC to VDD)
–
–
1.5
dB
Highest Line Current for Maximum Gain
–
20
–
mA
Lowest Line Current for Minimum Gain
–
50
–
mA
BALANCE RETURN LOSS
Balance Return Loss with Respect to 600
20
–
–
dB
SIDETONE
Voltage Gain from VHM to VEAR
–
–
28
dB
S1 in Position 2
LOGARITHMIC AMPLIFIERS AND ENVELOPE DETECTORS
Voltage Gain from RXI to RSA
18
20
22
dB
VRXI = 15 mVrms
Voltage Gain from BMI to TSA
17.5
18.5
19.5
dB
VBM = 0.5 mVrms
Dynamic Range of Logarithmic Compression from TSA to TSE and RSA to RSE
40
–
–
dB
ITSA and IRSA from 2.5 A to 250 A
Envelope Tracking Between TSE and RSE and Between TBN and RBN
–
±3.0
–
dB
Maximum Source Current from TSE or RSE
0.3
0.4
0.5
A
NOTE:
2. Corresponding to –0.6 dB gain from the line to output RLS in the typical application.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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