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參數(shù)資料
| 型號(hào)： | MC26LS30DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual Differential (EIA-422-A)/Quad Single-Ended (EIA-423-A) Line Drivers |
| 中文描述： | QUAD LINE DRIVER, PDSO16 |
| 封裝： | LEAD FREE, SOIC-16 |
| 文件頁數(shù)： | 6/14頁 |
| 文件大小： | 123K |
| 代理商： | MC26LS30DR2G |
MC26LS30
http://onsemi.com
6
Figure 4. Differential Mode Enable Timing
NOTES:
1. S.G. set to: f
2. Above tests conducted by monitoring output current levels.
1.0 MHz; duty cycle = 50%; t
r
, t
f
,
10 ns.
Figure 5. SingleEnded Mode Rise
/
Fall Time and Data Propagation Delay
NOTES:
1. S.G. set to: f
2. t
SK4
=
t
PDH
t
PDL
for each driver.
3. t
SK5
computed by subtracting the shortest t
PDH
from the longest t
PDH
of the 4 drivers within a package.
4. t
SK6
computed by subtracting the shortest t
PDL
from the longest t
PDL
of the 4 drivers within a package.
100 kHz; duty cycle = 50%; t
r
, t
f
,
10 ns.
V
EE
t
PZH
t
PZL
t
PLZ
t
PHZ
1.5 V
Output
Current
(V
in
= Lo)
0.1 V
SS
/R
L
0.1 V
SS
/R
L
V
SS
/R
L
V
SS
/R
L
0.5 V
SS
/R
L
0.5 V
SS
/R
L
R
L
0 or 3.0 V
En
V
SS
500 pF
450
S.G.
V
CC
450
C
C
+3.0 V
1.5 V
0 V
V
in
V
CC
V
in
+2.5 V
S.G.
500 pF
V
O
(V
in
= Hi)
Vin
1.5 V
V
out
10%
50%
90%
t
r
1.5 V
90%
50%
0 V
10%
V
in
t
f
t
PDL
t
PDH
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