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參數(shù)資料
| 型號： | MC26LS30DR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Dual Differential (EIA-422-A)/Quad Single-Ended (EIA-423-A) Line Drivers |
| 中文描述： | QUAD LINE DRIVER, PDSO16 |
| 封裝： | LEAD FREE, SOIC-16 |
| 文件頁數(shù)： | 4/14頁 |
| 文件大?。?/td> | 123K |
| 代理商： | MC26LS30DR2G |
MC26LS30
http://onsemi.com
4
ELECTRICAL CHARACTERISTICS
(EIA423A singleended mode, Pin 4
|V
EE
5.25 V, (Notes 1 and 3) unless otherwise noted).
2.0 V, 40
°
C
T
A
85
°
C, 4.75 V
V
CC
,
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage (V
CC
=
V
EE
= 4.75 V)
SingleEnded Voltage, R
L
=
∞
(Figure 2)
SingleEnded Voltage, R
L
= 450
, (Figure 2)
Voltage Imbalance (Note 5), R
L
= 450
V
O1
V
O2
V
O2
I
SLEW
4.0
3.6
4.2
3.95
0.05
6.0
6.0
0.4
Vdc
Slew Control Current (Pins 16, 13, 12, 9)
±
120
μ
A
Output Current (Each Output)
Power Off Leakage, V
CC
= V
EE
= 0, 6.0 V
Short Circuit Current (Output Short to Ground, Note 2)
V
in
0.8 V (T
A
= 25
°
C)
V
in
0.8 V (40
°
C
T
A
V
in
2.0 V (T
A
= 25
°
C)
V
in
2.0 V (40
°
C
T
A
Inputs
Low Level Voltage
High Level Voltage
Current @ V
in
= 2.4 V
Current @ V
in
= 15 V
Current @ V
in
= 0.4 V
Current, 0
V
in
15 V, V
CC
= 0
Clamp Voltage (I
in
= 12 mA)
Power Supply Current (Outputs Open)
V
CC
= +5.25 V, V
EE
= 5.25 V, V
in
= 0.4 V
V
O
+6.0 V
+85
°
C)
+85
°
C)
I
OLK
I
SC+
I
SC+
I
SC
I
SC
100
60
50
150
150
0
80
95
+100
150
150
60
50
μ
A
mA
V
IL
V
IH
I
IH
I
IHH
I
IL
I
IX
V
IK
I
CC
I
EE
2.0
200
1.5
0
0
8.0
0
0.8
40
100
Vdc
Vdc
μ
A
Vdc
22
17
8.0
30
mA
TIMING CHARACTERISTICS
(EIA423A singleended mode, Pin 4
3) unless otherwise noted.)
2.0 V, T
A
= 25
°
C, V
CC
= 5.0 V, V
EE
= 5.0 V, (Notes 1 and
Characteristic
Symbol
Min
Typ
Max
Unit
Output Timing (Figure 5)
Output Rise Time, C
C
= 0
Output Fall Time, C
C
= 0
Output Rise Time, C
C
= 50 pF
Output Fall Time, C
C
= 50 pF
Rise Time Coefficient (Figure 16)
t
r
t
f
t
r
t
f
65
65
3.0
3.0
300
300
ns
μ
s
C
rt
0.06
μ
s/pF
ns
Propagation Delay Time, Input to Single Ended Output (Figure 5)
Input Low to High, C
C
= 0
Input High to Low, C
C
= 0
Skew Timing, C
C
= 0 (Figure 5)
t
PDH
to t
PDL
for Each Driver
Max to Min t
PDH
Within a Package
Max to Min t
PDL
Within a Package
t
PDH
t
PDL
100
100
300
300
t
SK4
t
SK5
t
SK6
15
2.0
5.0
ns
1. All voltages measured with respect to Pin 5.
2. Only one output shorted at a time, for not more than 1 second.
3. Typical values established at +25
°
C, V
CC
= +5.0 V, V
EE
= 5.0 V.
4. V
switched from 0.8 to 2.0 V.
5. Imbalance is the difference between
V
O2
with V
in
0.8 V and
V
O2
with V
in
2.0 V.
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