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| 型號： | MC14551BFELG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 9/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MUX/DEMUX QUAD 2X1 16SOEIAJ |
| 產(chǎn)品變化通告： | 1Q2012 Discontinuation 30/Mar/2012 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | 4000B |
| 功能： | 多路復(fù)用器/多路分解器 |
| 電路： | 4 x 2:1 |
| 導(dǎo)通狀態(tài)電阻： | 280 歐姆 |
| 電壓電源： | 雙電源 |
| 電壓 - 電源，單路/雙路(±)： | ±3 V ~ 18 V |
| 電流 - 電源： | 360nA |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOEIAJ |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | MC14551BFELGOSCT |
MC14551B
http://onsemi.com
8
APPLICATIONS INFORMATION
Figure A illustrates use of the onchip level converter
detailed in Figure 2. The 0to5.0 V Digital Control signal is
used to directly control a 9 Vpp analog signal.
The digital control logic levels are determined by VDD and
VSS. The VDD voltage is the logic high voltage; the VSS
voltage is logic low. For the example, VDD = + 5.0 V = logic
high at the control inputs; VSS = GND = 0 V = logic low.
The maximum analog signal level is determined by VDD
and VEE. The VDD voltage determines the maximum
recommended peak above VSS. The VEE voltage determines
the maximum swing below VSS. For the example, VDD – VSS
= 5.0 V maximum swing above VSS; VSS – VEE = 5.0 V
maximum swing below VSS. The example shows a ± 4.5 V
signal which allows a 1/2 V margin at each peak. If voltage
transients above VDD and/or below VEE are anticipated on the
analog channels, external diodes (Dx) are recommended as
shown in Figure B. These diodes should be small signal types
able to absorb the maximum anticipated current surges during
clipping.
The absolute maximum potential difference between VDD
and VEE is 18 V. Most parameters are specified up to 15 V
which is the recommended maximum difference between
VDD and VEE.
Balanced supplies are not required. However, VSS must be
greater than or equal to VEE. For example, VDD = + 10 V, VSS
= + 5.0 V, and VEE = – 3.0 V is acceptable. See the table below.
Figure A. Application Example
EXTERNAL
CMOS
DIGITAL
CIRCUITRY
9 Vp-p
ANALOG SIGNAL
0-TO-5 V DIGITAL
CONTROL SIGNAL
VDD VSS
VEE
SWITCH
I/O
COMMON
O/I
CONTROL
MC14551B
-5 V
+ 5 V
9 Vp-p
ANALOG SIGNAL
+ 4.5 V
- 4.5 V
GND
VDD
VEE
Dx
SWITCH
I/O
COMMON
O/I
Figure B. External Schottky or Germanium Clipping Diodes
+ 5 V
POSSIBLE SUPPLY CONNECTIONS
VDD
In Volts
VSS
In Volts
VEE
In Volts
Control Inputs
Logic High/Logic Low
In Volts
Maximum Analog Signal Range
In Volts
+ 8
0
– 8
+ 8/0
+ 8 to – 8 = 16 Vp–p
+ 5
0
– 12
+ 5/0
+ 5 to – 12 = 17 Vp–p
+ 5
0
0
+ 5/0
+ 5 to 0 = 5 Vp–p
+ 5
0
– 5
+ 5/0
+ 5 to – 5 = 10 Vp–p
+ 10
– 5
+ 10/ + 5
+ 10 to – 5 = 15 Vp–p
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