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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | MC14536BDWR2 |
| 寤犲晢锛� | ON Semiconductor |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 8/14闋�(y猫) |
| 鏂囦欢澶у皬锛� | 0K |
| 鎻忚堪锛� | IC OSC PROG TIMER 2MHZ 16SOIC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 椤炲瀷锛� | 鍙法绋嬭▓(j矛)鏅�(sh铆)鍣� |
| 闋荤巼锛� | 2MHz |
| 闆绘簮闆诲锛� | 3 V ~ 18 V |
| 闆绘祦 - 闆绘簮锛� | 15µA |
| 宸ヤ綔婧害锛� | -55°C ~ 125°C |
| 灏佽/澶栨锛� | 16-SOIC锛�0.295"锛�7.50mm 瀵級 |
| 鍖呰锛� | 妯�(bi膩o)婧�(zh菙n)鍖呰 |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 16-SOIC W |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 鍏跺畠鍚嶇ū锛� | MC14536BDWR2OSDKR |
绗�1闋�(y猫)绗�2闋�(y猫)绗�3闋�(y猫)绗�4闋�(y猫)绗�5闋�(y猫)绗�6闋�(y猫)绗�7闋�(y猫)鐣�(d膩ng)鍓嶇8闋�(y猫)绗�9闋�(y猫)绗�10闋�(y猫)绗�11闋�(y猫)绗�12闋�(y猫)绗�13闋�(y猫)绗�14闋�(y猫)
MC14536B
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic
Symbol
VDD
Vdc
55_C
25_C
125_C
Unit
Min
Max
Min
Typ
(Note 2)
Max
Min
Max
Output Voltage
鈥�0鈥� Level
Vin = VDD or 0
VOL
5.0
10
15
0.05
0
0.05
0.05
Vdc
鈥�1鈥� Level
Vin = 0 or VDD
VOH
5.0
10
15
4.95
9.95
14.95
4.95
9.95
14.95
5.0
10
15
4.95
9.95
14.95
Vdc
Input Voltage
鈥�0鈥� Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)
VIL
5.0
10
15
1.5
3.0
4.0
2.25
4.50
6.75
1.5
3.0
4.0
1.5
3.0
4.0
Vdc
鈥�1鈥� Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)
VIH
5.0
10
15
3.5
7.0
11
3.5
7.0
11
2.75
5.50
8.25
3.5
7.0
11
Vdc
Output Drive Current
(VOH = 2.5 Vdc)
Source
(VOH = 4.6 Vdc)
Pins 4 & 5
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
IOH
5.0
10
15
鈥� 1.2
鈥� 0.25
鈥� 0.62
鈥� 1.8
鈥� 1.0
鈥� 0.25
鈥� 1.5
鈥� 1.7
鈥� 0.36
鈥� 0.9
鈥� 3.5
鈥� 0.7
鈥� 0.14
鈥� 0.35
鈥� 1.1
mAdc
(VOH = 2.5 Vdc)
Source
(VOH = 4.6 Vdc)
Pin 13
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
5.0
10
15
鈥� 3.0
鈥� 0.64
鈥� 1.6
鈥� 4.2
鈥� 2.4
鈥� 0.51
鈥� 1.3
鈥� 3.4
鈥� 4.2
鈥� 0.88
鈥� 2.25
鈥� 8.8
鈥� 1.7
鈥� 0.36
鈥� 0.9
鈥� 2.4
mAdc
(VOL = 0.4 Vdc)
Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
IOL
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mAdc
Input Current
Iin
15
卤0.1
卤0.00001
卤0.1
卤1.0
mAdc
Input Capacitance
(Vin = 0)
Cin
5.0
7.5
pF
Quiescent Current (Per Package)
IDD
5.0
10
15
5.0
10
20
0.010
0.020
0.030
5.0
10
20
150
300
600
mAdc
Total Supply Current (Note 3, 4)
(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)
IT
5.0
10
15
IT = (1.50 mA/kHz) f + IDD
IT = (2.30 mA/kHz) f + IDD
IT = (3.55 mA/kHz) f + IDD
mAdc
2. Data labelled 鈥淭yp鈥� is not to be used for design purposes but is intended as an indication of the IC鈥檚 potential performance.
3. The formulas given are for the typical characteristics only at 25_C.
4. To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL 鈥� 50) Vfk
where: IT is in mA (per package), CL in pF, V = (VDD 鈥� VSS) in volts, f in kHz is input frequency, and k = 0.003.
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