參數(shù)資料
型號(hào): MC145170-2
廠商: Motorola, Inc.
英文描述: PLL Frequency Synthesizer With Serial Interface(帶串行口的PLL頻率合成器)
中文描述: 鎖相環(huán)頻率合成器的串行接口(帶串行口的鎖相環(huán)頻率合成器)
文件頁數(shù): 13/26頁
文件大?。?/td> 373K
代理商: MC145170-2
MC145170–2
13
MOTOROLA RF/IF DEVICE DATA
ENB
CLK
Din
1
2
3
4
5
6
7
8
MSB
LSB
N10
N9
N8
N7
N6
N5
N4
N3
N2
N1
N0
N11
N12
N13
N14
N15
9
10
11
12
13
14
15
16
0
0
0
0
0
0
0
0
0
0
0
F
F
0
0
0
0
2
2
2
2
2
2
2
F
F
0
1
2
3
5
6
7
8
9
A
B
E
F
Not Allowed
Not Allowed
Not Allowed
Not Allowed
Not Allowed
Not Allowed
Not Allowed
N Counter =
÷
40
N Counter =
÷
41
N Counter =
÷
42
N Counter =
÷
43
N Counter =
÷
65,534
N Counter =
÷
65,535
Hexadecimal Value
0
0
0
0
0
0
0
0
0
0
0
F
F
Decimal Equivalent
*
* At this point, the two new bytes are transferred to the N register and stored. No other registers are affected. In addition, the N and
R counters are jam–loaded and begin counting down together.
Figure 16. N Register Access and Format (16 Clock Cycles Are Used)
NOTE:
The PDout generates error pulses during out–of–lock conditions. When locked in phase and frequency, the output is high impedance and
the voltage at that pin is determined by the low–pass filter capacitor. PDout,
φ
R, and
φ
V are shown with the polarity bit (POL) = low;
see Figure 14 for POL.
fR
Reference
OSCin
÷
R
fV
Feedback
(fin
÷
N)
PDout
φ
R
φ
V
LD
VH
VL
VH
VH
VL
VH
VL
High Impedance
VH
VL
VH
VL
VL
VH = High voltage level
VL = Low voltage level
*At this point, when both fR and fV are in phase, both the sinking and sourcing output FETs are turned on for a very short interval.
*
Figure 17. Phase/Frequency Detectors and Lock Detector Output Waveforms
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