參數(shù)資料
型號(hào): MC14490DW
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: OSCILLATOR 66.666MHZ SMD
中文描述: 4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16
封裝: PLASTIC, SOIC-16
文件頁數(shù): 3/9頁
文件大?。?/td> 265K
代理商: MC14490DW
MOTOROLA CMOS LOGIC DATA
299
MC14490
Characteristic
Output Rise Time
Symbol
tTLH
Vdc
5.0
5.0
10
Min
Typ #
180
100
30
Max
360
200
60
Unit
ns
Output Fall Time
Oscillator Output
ns
Oscillator Input to Debounce Outputs
5.0
5.0
10
10
10
15
80
285
370
6
40
570
740
3.0
(External Clock)
Rise and Fall Time
Oscillator Input
Cext
100 pF*
No Limit
1.5
Cext (in
μ
F)
Note: These equations are intended to be a design guide.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
15
*POWER–DOWN CONSIDERATIONS
Large values of Cext may cause problems when powering down the MC14490 because of the amount of energy stored in the
capacitor. When a system containing this device is powered down, the capacitor may discharge through the input protection
diodes at Pin 7 or the parasitic diodes at Pin 9. Current through these internal diodes must be limited to 10 mA, therefore the
turn–off time of the power supply must not be faster than t = (VDD – VSS) Cext/(10 mA). For example, If VDD – VSS = 15 V and
Cext = 1
μ
F, the power supply must turn off no faster than t = (15 V) (1
μ
F)/10 mA = 1.5 ms. This is usually not a problem
because power supplies are heavily filtered and cannot discharge at this rate.
When a more rapid decrease of the power supply to zero volts occurs, the MC14490 may sustain damage. To avoid this possi-
bility, use external clamping diodes, D1 and D2, connected as shown in Figure 2.
VDD
50%
Figure 1. Switching Waveforms
Figure 2. Discharge Protection During Power Down
OSCin
Aout
Aout
OSCin
Ain
0 V
VDD
0 V
VDD
0 V
90%
10%
50%
tr
tf
tPHL
90%
10%
50%
50%
tsu
50%
D1
D2
Cext
9
7
OSCin
OSCout
MC14490
tPLH
VDD
VDD
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