參數(shù)資料
型號(hào): MC145146P-2
廠商: Motorola, Inc.
英文描述: .01 UF/630VDC METAL POLY CAP
中文描述: 4位數(shù)據(jù)總線輸入總線輸入鎖相環(huán)頻率合成器
文件頁(yè)數(shù): 1/2頁(yè)
文件大?。?/td> 55K
代理商: MC145146P-2
MC145146–2
MOTOROLA
1
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Interfaces with Dual–Modulus Prescalers
The MC145146–2 is programmed by a 4–bit input, with strobe and address
lines. The device features consist of a reference oscillator, 12–bit program-
mable reference divider, digital phase detector, 10–bit programmable divide–
by–N counter, 7–bit divide–by–A counter, and the necessary latch circuitry for
accepting the 4–bit input data.
Operating Temperature Range: – 40 to 85
°
C
Low Power Consumption Through the Use of CMOS Technology
3.0 to 9.0 V Supply Range
Programmable Reference Divider for Values Between 3 and 4095
Dual–Modulus 4–Bit Data Bus Programming
÷
N Range = 3 to 1023,
÷
A Range = 0 to 127
“Linearized” Digital Phase Detector Enhances Transfer Function Linearity
Two Error Signal Options:
Single–Ended (Three–State)
Double–Ended
NOT RECOMMENDED FOR NEW DESIGNS;
PRODUCT TO BE PHASED OUT.
Closest equivalents are the MC145152–2, MC145170–1,
MC14519X series, and MC14520X series.
BLOCK DIAGRAM
MODULUS CONTROL (MC)
7–BIT
÷
A COUNTER
CONTROL LOGIC
PDout
LD
LOCK
DETECT
PHASE
DETECTOR B
PHASE
DETECTOR A
ST
A0
A1
A2
D3
D2
D1
D0
12–BIT
÷
R COUNTER
LATCHES
LATCH
CONTROL
CIRCUITRY
10–BIT
÷
N COUNTER
OSCin
OSCout
fin
L5
L6
L7
L2
L3
L4
L0
L1
fR
φ
V
φ
R
fV
Order this document
by MC145146–2/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
P SUFFIX
PLASTIC DIP
CASE 738
DW SUFFIX
SOG PACKAGE
CASE 751D
ORDERING INFORMATION
MC145146P2
MC145146DW2
Plastic DIP
SOG Package
20
1
VDD
VSS
fin
D0
D1
A1
A0
OSCout
OSCin
PDout
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
φ
V
fV
φ
R
fR
D3
D2
A2
ST
LD
MC
20
1
REV 2
1/98
相關(guān)PDF資料
PDF描述
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