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參數(shù)資料
| 型號： | MC14490DW |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | OSCILLATOR 50.000MHZ SMD |
| 中文描述： | 4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 5/9頁 |
| 文件大?。?/td> | 265K |
| 代理商： | MC14490DW |
MOTOROLA CMOS LOGIC DATA
301
MC14490
Figure 4. Typical “Form A” Contact Debounce Circuit
(Only One Debouncer Shown)
1/2 BIT
DELAY
OSCILLATOR
AND
TWO–PHASE
CLOCK GENERATOR
Cext
OSCout
OSCin
“FORM A”
CONTACT
Ain
1
9
7
φ
1
φ
2
DATA
SHIFT
LOAD
4–BIT STATIC SHIFT REGISTER
φ
1
φ
2
φ
1
φ
2
15
Aout
+VDD
PULLUP RESISTOR
(INTERNAL)
OPERATING CHARACTERISTICS
The single most important characteristic of the MC14490
is that it works with a single signal lead as an input, making
it directly compatible with mechanical contacts (Form A
and B).
The circuit has a built–in pullup resistor on each input. The
worst case value of the pullup resistor (determined from the
Electrical Characteristics table) is used to calculate the con-
tact wetting current. If more contact current is required, an
external resistor may be connected between VDD and the
input.
Because of the built–in pullup resistors, the inputs cannot
be driven with a single standard CMOS gate when VDD is be-
low 5 V. At this voltage, the input should be driven with paral-
leled standard gates or by the MC14049 or MC14050
buffers.
The clock input circuit (pin 7) has Schmitt trigger shaping
such that proper clocking will occur even with very slow clock
edges, eliminating any need for clock preshaping. In addi-
tion, other MC14490 oscillator inputs can be driven from a
single oscillator output buffered by an MC14050 (see Fig-
ure 5). Up to six MC14490s may be driven by a single buffer.
The MC14490 is TTL compatible on both the inputs and
the outputs. When VDD is at 4.5 V, the buffered outputs can
sink 1.6 mA at 0.4 V. The inputs can be driven with TTL as a
result of the internal input pullup resistors.
Figure 5. Typical Single Oscillator Debounce System
FROM CONTACTS
MC14490
TO SYSTEM
OSCin
OSCout
Cext
1/6 MC14050
9
7
OSCin7
9 OSCout
NO CONNECTION
FROM
CONTACTS
TO SYSTEM
LOGIC
MC14490
NO CONNECTION
9 OSCout
OSCin7
FROM CONTACTS
MC14490
TO SYSTEM
LOGIC
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC14490DWR2 | Hex Contact Bounce Eliminator |
| MC14490P | Digital Signal Processor 181-CPGA -55 to 125 |
| MC14490F | CRYSTAL 9.216MHZ 20PF HC-49/UA |
| MC14490FEL | Hex Contact Bounce Eliminator |
| MC14490DW | OSCILLATOR 66.666MHZ SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC14490DWG | 功能描述:算數(shù)邏輯單元 - ALU LOG CMOS 3-18V HEX BOUNCE ELIMINATOR RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
| MC14490DWG | 制造商:ON Semiconductor 功能描述:Gate / Inverter Logic IC Package/Case:16 |
| MC14490DWR2 | 功能描述:算數(shù)邏輯單元 - ALU LOG CMOS 3-18V HEX BOUNCE ELIMINATOR RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
| MC14490DWR2G | 功能描述:算數(shù)邏輯單元 - ALU LOG CMOS 3-18V HEX BOUNCE ELIMINATOR RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
| MC14490F | 功能描述:算數(shù)邏輯單元 - ALU LOG CMOS 3-18V HEX BOUNCE ELIMINATOR RoHS:否 制造商:ON Semiconductor 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:18 V 電源電壓-最小:3 V 封裝 / 箱體:SOIC-16 Wide 最大工作溫度:+ 125 C 封裝:Reel |
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