參數(shù)資料
型號(hào): MC14490P
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Digital Signal Processor 181-CPGA -55 to 125
中文描述: 4000/14000/40000 SERIES, 4-BIT RIGHT SERIAL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16
封裝: PLASTIC, DIP-16
文件頁(yè)數(shù): 1/9頁(yè)
文件大?。?/td> 265K
代理商: MC14490P
MOTOROLA CMOS LOGIC DATA
Motorola, Inc. 1995
297
MC14490
The MC14490 is constructed with complementary MOS enhancement
mode devices, and is used for the elimination of extraneous level changes
that result when interfacing with mechanical contacts. The digital contact
bounce eliminator circuit takes an input signal from a bouncing contact and
generates a clean digital signal four clock periods after the input has
stabilized. The bounce eliminator circuit will remove bounce on both the
“make” and the “break” of a contact closure. The clock for operation of the
MC14490 is derived from an internal R–C oscillator which requires only an
external capacitor to adjust for the desired operating frequency (bounce
delay). The clock may also be driven from an external clock source or the
oscillator of another MC14490 (see Figure 5).
NOTE: Immediately after power–up, the outputs of the MC14490 are in
indeterminate states.
Diode Protection on All Inputs
Six Debouncers Per Package
Internal Pullups on All Data Inputs
Can Be Used as a Digital Integrator, System Synchronizer, or Delay
Line
Internal Oscillator (R–C), or External Clock Source
TTL Compatible Data Inputs/Outputs
Single Line Input, Debounces Both “Make” and “Break” Contacts
Does Not Require “Form C” (Single Pole Double Throw) Input Signal
Cascadable for Longer Time Delays
Schmitt Trigger on Clock Input (Pin 7)
Supply Voltage Range = 3.0 V to 18 V
Chip Complexity: 546 FETs or 136.5 Equivalent Gates
BLOCK DIAGRAM
Ain
1
OSCin
7
OSCout
9
Bin14
Cin
3
Din12
Ein
5
Fin10
+VDD
φ
1
φ
2
OSCILLATOR
AND
TWO–PHASE
CLOCK GENERATOR
DATA
SHIFT
LOAD
4–BIT STATIC SHIFT REGISTER
1/2–BIT
DELAY
φ
1
φ
2
φ
1
φ
2
15 Aout
VDD = PIN 16
VSS = PIN 8
φ
1
φ
2
φ
1
φ
2
φ
1
φ
2
φ
1
φ
2
φ
1
φ
2
2
Bout
13 Cout
4
Dout
11 Eout
6
Fout
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
IDENTICAL TO ABOVE STAGE
SEMICONDUCTOR TECHNICAL DATA
REV 3
1/94
L SUFFIX
CERAMIC
CASE 620
P SUFFIX
PLASTIC
CASE 648
DW SUFFIX
SOIC
CASE 751G
ORDERING INFORMATION
MC14490P
MC14490L
MC14490DW
TA = – 55
°
to 125
°
C for all packages.
Plastic
Ceramic
SOIC
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