- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄29119 > MC10170FN (ON SEMICONDUCTOR) 10K SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PQCC20 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC10170FN |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 算術(shù)邏輯單元 |
| 英文描述： | 10K SERIES, 9-BIT PARITY GENERATOR/CHECKER, COMPLEMENTARY OUTPUT, PQCC20 |
| 封裝： | PLASTIC, LCC-20 |
| 文件頁(yè)數(shù)： | 1/3頁(yè) |
| 文件大?。?/td> | 51K |
| 代理商： | MC10170FN |
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 7
370
Publication Order Number:
MC10170/D
MC10170
9+2-Bit Parity Generator/
Checker
The MC10170 is a 11–bit parity circuit, which is segmented into 9
data bits and 2 control bits.
Output A generates odd parity on 9 bits; that is, Output A goes high
for an odd number of high logic levels on the bit inputs in only 2 gate
delays.
The Control Inputs can be used to expand parity to larger numbers
of bits with minimal delay or can be used to generate even parity. To
expand parity to larger words, the MC10170 can be used with the
MC10160 or other MC10170’s. The MC10170 can generate both even
and odd parity.
PD = 300 mW typ/pkg (No Load)
tpd = 2.5 ns typ (Control Inputs to B Output)
4.0 ns typ (Data Inputs to A Output)
6.0 ns typ (Data Inputs to B Output)
tr, tf = 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
2 A
ODD PARITY
15 B
EVEN PARITY
13 HIGH
14 LOW
3
D0
4
D1
5
D2
6
D3
7
D4
9
D5
10
D6
11
D7
12
D8
CONTROL
INPUTS
OUTPUTS
Sum of
Odd Parity
Even Parity
Sum of
DI
t
Odd Parity
Even Parity
D Inputs
at High Level
Output A
Output B
Even
Low
High
Odd
High
Low
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC10170L
CDIP–16
25 Units / Rail
MC10170P
PDIP–16
25 Units / Rail
MC10170FN
PLCC–20
46 Units / Rail
MARKING
DIAGRAMS
1
16
A
= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
CDIP–16
L SUFFIX
CASE 620
MC10170L
AWLYYWW
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775
10170
AWLYYWW
1
16
MC10170P
AWLYYWW
DIP PIN ASSIGNMENT
VCC1
A
D0
D1
D2
D3
D4
VEE
VCC2
B
LOW
HIGH
D8
D7
D6
D5
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables
on page 18.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC10171FNR2 | 10K SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PQCC20 |
| MC10176L | 10K SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, CDIP16 |
| MC10182L | 10K SERIES, 2-BIT ARITHMETIC LOGIC UNIT, CDIP16 |
| MC10192L | 10K SERIES, QUAD 2-BIT DRIVER, COMPLEMENTARY OUTPUT, CDIP16 |
| MC10212FNR2 | 10K SERIES, DUAL 3-INPUT OR/NOR GATE, PQCC20 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC10170L | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC10170P | 制造商:Motorola Inc 功能描述: |
| MC10171FN WAF | 制造商:ON Semiconductor 功能描述: |
| MC10171L | 制造商:ON Semiconductor 功能描述:Decoder/Demultiplexer Dual 2-to-4 16-Pin CDIP Rail |
| MC10171P | 制造商:ON Semiconductor 功能描述:Decoder/Demultiplexer Dual 2-to-4 16-Pin PDIP Rail 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。