參數(shù)資料
型號: MC10168P
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Quad Latch
中文描述: 10K SERIES, HIGH LEVEL TRIGGERED D LATCH, TRUE OUTPUT, PDIP16
文件頁數(shù): 1/4頁
文件大?。?/td> 69K
代理商: MC10168P
SEMICONDUCTOR TECHNICAL DATA
3–99
REV 6
Motorola, Inc. 1996
9/96
The MC10168 is a Quad Latch with common clocking to all four latches.
Separate output enabling gates are provided for each latch, allowing direct
wiring to a bus. When the clock is high, outputs will follow the D inputs.
Information is latched on the negative–going transition of the clock.
PD= 310 mW typ/pkg (No Load)
tpd= G to Q = 2 ns typ
D to Q = 3 ns typ
C to Q = 4 ns typ
tr, tf= 2.0 ns typ (20%–80%)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE= PIN 8
Q3
Q2
Q1
Q0
3
D0
5
4
G0
G1
7
D1
13
CC
9
D2
12
10
G2
G3
14
D3
2
Q0
6
Q1
11 Q2
15 Q3
TRUTH TABLE
G
H
L
L
L
C
X
L
H
H
D
X
X
L
H
Qn+1
L
Qn
L
H
PIN ASSIGNMENT
VCC1
Q0
D0
G1
G0
Q1
D1
VEE
VCC2
Q3
D3
CC
G2
Q2
G3
D2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
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