參數(shù)資料
型號(hào): MC100EP196FAG
廠商: ON Semiconductor
文件頁數(shù): 8/18頁
文件大小: 0K
描述: IC DELAY LINE 1024TAP 32-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: 100EP
標(biāo)片/步級(jí)數(shù): 1024
功能: 可編程
延遲到第一抽頭: 2.36ns
接頭增量: 10ps
可用的總延遲: 2.36ns ~ 12.258ns
獨(dú)立延遲數(shù): 1
電源電壓: 3 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-LQFP(7x7)
包裝: 托盤
其它名稱: MC100EP196FAGOS
MC100EP196
http://onsemi.com
16
MultiChannel Deskewing
The most practical application for EP196 is in multiple
channel delay matching. Slight differences in impedance
and cable length can create large timing skews within a
highspeed system. To deskew multiple signal channels,
each channel can be sent through each EP196 as shown in
Figure 8. One signal channel can be used as reference and the
other EP196s can be used to adjust the delay to eliminate the
timing skews. Nearly any highspeed system can be fine
tuned (as small as 10 ps) to reduce the skew to extremely
tight tolerances using the available FTUNE pin.
Figure 8. Multiple Channel Deskewing Diagram
EP196
IN
Q
IN
Q
#1
EP196
IN
Q
IN
Q
#2
EP196
IN
Q
IN
Q
#N
Digital
Data
Control
Logic
DAC
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