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參數(shù)資料
| 型號(hào)： | MC-454CB646 |
| 廠商： | NEC Corp. |
| 英文描述： | 4 M-Word By 64-Bit Synchronous Dynamic RAM Module(同步動(dòng)態(tài)RAM 模塊) |
| 中文描述： | 4支M - 64個(gè)字位同步動(dòng)態(tài)隨機(jī)存儲(chǔ)器模塊（同步動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 136K |
| 代理商： | MC-454CB646 |
6
MC-454CB646
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter
Symbol
Test condition
Grade
MIN.
MAX.
Unit
Notes
Operating current
I
CC1
Burst length = 1,
/CAS latency
= 2
-A80
360
mA
1
t
RC
≥
t
RC (MIN.)
, I
O
= 0
mA
-A10
320
/CAS latency
= 3
-A80
460
-A10
360
Precharge standby current in
I
CC2
P
CKE
≤
V
IL (MAX.)
, t
CK
= 15
ns
4
mA
power down mode
I
CC2
PS
CKE
≤
V
IL (MAX.)
, t
CK
=
∞
2
Precharge standby current in
I
CC2
N
CKE
≥
V
IH (MIN.)
, t
CK
= 15
ns, /CS
≥
V
IH (MIN.)
,
80
mA
non power down mode
Input signals are changed one time during 30
ns.
I
CC2
NS
CKE
≥
V
IH (MIN.)
, t
CK
=
∞
, Input signals are stable.
24
Active standby current in
I
CC3
P
CKE
≤
V
IL (MAX.)
, t
CK
= 15
ns
20
mA
power down mode
I
CC3
PS
CKE
≤
V
IL (MAX.)
, t
CK
=
∞
16
Active standby current in
I
CC3
N
CKE
≥
V
IH (MIN.)
, t
CK
= 15
ns, /CS
≥
V
IH (MIN.)
,
100
mA
non power down mode
Input signals are changed one time during 30
ns.
I
CC3
NS CKE
≥
V
IH (MIN.)
, t
CK
=
∞
, Input signals are stable.
40
Operating current
I
CC4
t
CK
≥
t
CK (MIN.)
, I
O
= 0
mA
/CAS latency
= 2
-A80
660
mA
2
(Burst mode)
-A10
520
/CAS latency
= 3
-A80
780
-A10
660
Refresh current
I
CC5
/CAS latency
= 2
-A80
520
mA
3
-A10
520
/CAS latency
= 3
-A80
540
-A10
540
Self refresh current
I
CC6
CKE
≤
0.2
V
4
mA
Input leakage current
I
I (L)
V
I
= 0 to 3.6
V,
All other pins not under test = 0 V
4
+4
μ
A
Output leakage current
I
O (L)
D
OUT
is disabled, V
O
= 0 to 3.6
V
1.5
+1.5
μ
A
High level output voltage
V
OH
I
O
= –4.0
mA
2.4
V
Low level output voltage
V
OL
I
O
= +4.0
mA
0.4
V
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
2
. I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
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