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參數(shù)資料
| 型號(hào)： | MC-4532CD646 |
| 廠商： | NEC Corp. |
| 英文描述： | 32M-Word By 64-BIT Dynamic RAM Module(動(dòng)態(tài)RAM模塊) |
| 中文描述： | 32M的詞，64位動(dòng)態(tài)RAM模塊（動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁數(shù)： | 6/16頁 |
| 文件大小： | 144K |
| 代理商： | MC-4532CD646 |
Preliminary Data Sheet
6
MC-4532CD646
DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted)
Parameter
Symbol
Test condition
Grade
MIN.
MAX.
Unit
Notes
Operating current
I
CC1
Burst length
=
1
/CAS latency = 2
-A80
1,160
mA
1
t
RC
≥
t
RC(MIN.)
, I
O
= 0
mA
-A10
1,040
/CAS latency = 3
-A80
1,200
-A10
1,080
Precharge standby current in
I
CC2
P
CKE
≤
V
IL(MAX.)
, t
CK
=
15
ns
16
mA
power down mode
I
CC2
PS CKE
≤
V
IL(MAX.)
, t
CK
=
∞
8
Precharge standby current in
non power down mode
I
CC2
N
CKE
≥
V
IH(MIN.)
, t
CK
=
15
ns, /CS
≥
V
IH(MIN.)
,
Input signals are changed one time during 30
ns.
320
mA
I
CC2
NS CKE
≥
V
IH(MIN.)
, t
CK
=
∞
Input signals are stable.
96
Active standby current in
I
CC3
P
CKE
≤
V
IL(MAX.)
, t
CK
=
15
ns
80
mA
power down mode
I
CC3
PS CKE
≤
V
IL(MAX.)
, t
CK
=
∞
64
Active standby current in
I
CC3
N
CKE
≥
V
IH(MIN.)
, t
CK
=
15
ns, /CS
≥
V
IH(MIN.)
,
Input signals are changed one time during 30
ns.
400
mA
non power down mode
I
CC3
NS CKE
≥
V
IH(MIN.)
, t
CK
=
∞
Input signals are stable.
192
Operating current
I
CC4
t
CK
≥
t
CK(MIN.)
/CAS latency = 2
-A80
1,120
mA
2
(Burst mode)
I
O
= 0
mA
-A10
920
/CAS latency = 3
-A80
1,280
-A10
1,120
Refresh current
I
CC5
t
RC
≥
t
RC(MIN.)
/CAS latency = 2
-A80
2,280
mA
3
-A10
2,120
/CAS latency = 3
-A80
2,360
-A10
2,200
Self refresh current
I
CC6
CKE
≤
0.2
V
32
mA
Input leakage current
I
I(L)
V
I
=
0 to 3.6
V,
All other pins not under test =
0 V
–
16
+
16
μ
A
Input leakage current (CKE1)
– 500 +500
Output leakage current
I
O(L)
D
OUT
is disabled, V
O
=
0 to 3.6
V
–
3
+
3
μ
A
High level output voltage
V
OH
I
O
=
–
4.0
mA
2.4
V
Low level output voltage
V
OL
I
O
=
+
4.0
mA
0.4
V
Notes 1.
I
CC1
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC1
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
2
. I
CC4
depends on output loading and cycle rates. Specified values are obtained with the output open. In
addition to this, I
CC4
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
3.
I
CC5
is measured on condition that addresses are changed only one time during t
CK (MIN.)
.
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| MC-4532CD646EF-A10 | 制造商:NEC 制造商全稱:NEC 功能描述:32M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE UNBUFFERED TYPE |
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