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參數(shù)資料
| 型號(hào)： | MC-42S4LFG64S |
| 廠商： | NEC Corp. |
| 英文描述： | 3.3 V Operation 16M-Word By 65-Bit Dynamic RAM Module(工作電壓為3.3V的動(dòng)態(tài)RAM模塊) |
| 中文描述： | 3.3 V工作電壓1,600 - 65字位動(dòng)態(tài)RAM模塊（工作電壓為3.3伏的動(dòng)態(tài)內(nèi)存模塊） |
| 文件頁(yè)數(shù)： | 1/32頁(yè) |
| 文件大?。?/td> | 267K |
| 代理商： | MC-42S4LFG64S |
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1996
MOS INTEGRATED CIRCUIT
MC-42S4LFG64S
3.3 V OPERATION 4M-WORD BY 64-BIT
DYNAMIC RAM MODULE (SO DIMM), EDO
DATA SHEET
The mark
shows major revised points.
Document No. M12087EJ3V0DS00 (3rd edition)
Date Published Octocer 1997 NS
Printed in Japan
The information in this document is subject to change without notice.
Description
The MC-42S4LFG64S is a 4,194,304 words by 64 bits dynamic RAM module (Small Outline DIMM) on which 4
pieces of 64M DRAM :
μ
PD42S65165 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surface-
mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
Features
EDO (Hyper page mode)
4,194,304 words by 64 bits organization
Fast access and cycle time
Family
Access time
R/W cycle time
EDO (Hyper page mode)
Power consumption (MAX.)
(MAX.)
(MIN.)
cycle time (MIN.)
Active
Standby
MC-42S4LFG64S-A50
50 ns
84 ns
20 ns
2.16 W
2.88 mW
MC-42S4LFG64S-A60
60 ns
104 ns
25 ns
1.87 W
(CMOS level input)
Refresh cycle
Family
Refresh cycle
Refresh
MC-42S4LFG64S-A50
4,096 cycles / 128 ms
/RAS only refresh, Normal read / write, /CAS before /RAS refresh,
MC-42S4LFG64S-A60
/CAS before /RAS self refresh, Hidden refresh
144-pin small outline dual in-line memory module (Pin pitch = 0.8 mm)
Single +3.3 V ± 0.3 V power supply
Serial PD
Ordering Information
Part number
Access time
(MAX.)
Package
Mounted devices
MC-42S4LFG64SA-A50
50 ns
144-pin Small Outline DIMM
(Socket Type)
Edge connector : Gold plated
4 pieces of
μ
PD42S65165G5
(400 mil TSOP(II))
MC-42S4LFG64SA-A60
60 ns
[Double side]
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參數(shù)描述 |
|---|---|
| MC42S8LFF64SAA60 | 制造商:NEC Electronics Corporation 功能描述: |
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