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參數(shù)資料
| 型號： | MBC13720T1 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 衰減器 |
| 英文描述： | Amplifier with Bypass Switch |
| 中文描述： | 400 MHz - 2400 MHz RF/MICROWAVE WIDE BAND LOW POWER AMPLIFIER |
| 封裝： | PLASTIC, CASE 419B-01, SOT-363, 6 PIN |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 704K |
| 代理商： | MBC13720T1 |
Application Information
MOTOROLA
MBC13720
Technical Data
For More Information On This Product,
Go to: www.freescale.com
9
3 Application Information
The MBC13720 SiGe:C LNA is designed for applications in the 400 MHz to 2.4 GHz range. It has four
different modes; Low IP3, High IP3, Bypass, and Standby. The IC is programmable through the Enable 1
and 2 pins. In Low IP3 mode, the current consumption is optimized. Current consumption is higher in High
IP3 mode to boost the intercept point performance. The gain difference between Low IP3 and High IP3
modes is typically 1.0 dB and typically the Low IP3 mode has a slightly better noise figure performance.
The internal bypass switch is designed for broadband applications. One of the advantages of the
MBC13720 is the simplification of matching network in both bypass and amplifier modes. The bypass
switch is designed such that the changes of input and output return losses between bypass mode and
amplifier mode is minimized. As a result, the mismatch at the LNA input and output is minimized and
therefore, the matching network design is simplified as well.
In the design of the external matching network, conjugate match condition does not necessarily provide the
best noise figure performance. Balancing between noise figure, gain, and intercept point is the major
design consideration. Typical circuits are provided in Figures 2 and 3 for 1.9 GHz, 2.4 GHz and 900 MHz
applications.
In Figure 2, it shows the typical application circuit at 1.9 and 2.4 GHz. The noise figure, input intercept
point, gain, and return losses are optimized. L2 and C2 act as a low frequency trap to improve the input
intercept point. The noise figure measured on this board is 1.4 dB (in Low IP3 mode) at 1.9 GHz, including
the external components, connectors, and PC board. The input third order intercept point is 10 dBm (in
High IP3 mode).
470
0.66
0.19
9.7
0.21
25.16
480
0.67
0.18
10.3
0.2
25.01
490
0.67
0.18
10.9
0.2
24.87
500
0.67
0.18
11.5
0.2
24.54
550
0.68
0.17
14.5
0.19
24.06
600
0.69
0.16
17.5
0.19
23.59
650
0.7
0.15
20.5
0.18
23.12
700
0.71
0.14
23.5
0.18
22.65
750
0.72
0.13
26.5
0.17
22.17
800
0.73
0.12
29.4
0.17
21.7
850
0.74
0.11
32.4
0.16
21.23
900
0.75
0.1
35.4
0.16
20.76
1000
0.77
0.09
41.4
0.15
19.81
Table 9. High IP3 Noise Parameters (Continued)
(V
CC
= 2.7 V, EN1 = High, EN2 = Low)
f (MHz)
Fmin (dB)
Mag
Ang
Rn
Ga (dB)
F
Freescale Semiconductor, Inc.
n
.
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