參數(shù)資料
型號(hào)： MB9BF505NABGL
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PBGA112
封裝： 10 X 10 MM, 1.45 MM HEIGHT, 0.80 MM PITCH, PLASTIC, FBGA-112
文件頁(yè)數(shù)： 91/108頁(yè)
文件大小： 1298K
代理商： MB9BF505NABGL
83
FUJITSU SEMICONDUCTOR CONFIDENTIAL
r6.0
MB9B500A Series
(11) Quadrature Position/Revolution Counter timing
(Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40
°C to + 85°C)
Value
Parameter
Symbol
Conditions
Min
Max
Unit
AIN pin "H" width
tAHL
-
AIN pin "L" width
tALL
-
BIN pin "H" width
tBHL
-
BIN pin "L" width
tBLL
-
BIN rise time from
AIN pin "H" level
tAUBU
PC_Mode2 or
PC_Mode3
AIN fall time from
BIN pin "H" level
tBUAD
PC_Mode2 or
PC_Mode3
BIN fall time from
AIN pin "L" level
tADBD
PC_Mode2 or
PC_Mode3
AIN rise time from
BIN pin "L" level
tBDAU
PC_Mode2 or
PC_Mode3
AIN rise time from
BIN pin "H" level
tBUAU
PC_Mode2 or
PC_Mode3
BIN fall time from
AIN pin "H" level
tAUBD
PC_Mode2 or
PC_Mode3
AIN fall time from
BIN pin "L" level
tBDAD
PC_Mode2 or
PC_Mode3
BIN rise time from
AIN pin "L" level
tADBU
PC_Mode2 or
PC_Mode3
ZIN pin "H" width
tZHL
QCR:CGSC="0"
ZIN pin "L" width
tZLL
QCR:CGSC="0"
AIN/BIN rise and fall time
from determined ZIN level
tZABE
QCR:CGSC="1"
Determined ZIN level from
AIN/BIN rise and fall time
tABEZ
QCR:CGSC="1"
2tCYCP *
-
ns
* : tCYCP indicates the APB bus clock cycle time except stop when in stop mode. Please see the block diagram to
refer the APB bus number which QPRC is connected.
tAHL
tALL
tAUBU
tBUAD
tBLL
tBHL
tBDAU
AIN
BIN
tADBD
DS706-00021-1v0-E
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