參數(shù)資料
型號: MB9BF505NABGL
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PBGA112
封裝: 10 X 10 MM, 1.45 MM HEIGHT, 0.80 MM PITCH, PLASTIC, FBGA-112
文件頁數(shù): 72/108頁
文件大?。?/td> 1298K
代理商: MB9BF505NABGL
66
FUJITSU SEMICONDUCTOR CONFIDENTIAL
r6.0
MB9B500A Series
AC Characteristics
The following tables show the AC characteristics.
(1) Main Clock Input Characteristics
(Vcc = 2.7V to 5.5V, Vss = 0V Ta = - 40
°C to + 85°C)
Value
Parameter
Symbol
Pin
name
Conditions
Min
Max
Unit
Remarks
Vcc
≥ 4.5V
4
48
Vcc
< 4.5V
4
20
MHz
When crystal oscillator
is connected
Vcc
≥ 4.5V
4
48
Input frequency
FCH
Vcc
< 4.5V
4
20
MHz
When using external
clock
Vcc
≥ 4.5V
20.83
250
Input clock cycle
tCYLH
Vcc
< 4.5V
50
250
ns
When using external
clock
Input clock pulse
width
-
PWH/tCYLH
PWL/tCYLH
45
55
%
When using external
clock
Input clock rise
time and fall time
tCF
tCR
X0
X1
-
5
ns
When using external
clock
FCC
-
80
MHz
Base clock
(HCLK/FCLK)
FCP0
-
40
MHz
APB0 bus clock
(PCLK0)
FCP1
-
40
MHz
APB1 bus clock
(PCLK1)
Internal operating
clock
frequency
FCP2
-
40
MHz
APB2 bus clock
(PCLK2)
tCYCC
-
12.5
-
ns
Base clock
(HCLK/FCLK)
tCYCP0
-
25
-
ns
APB0 bus clock
(PCLK0)
tCYCP1
-
25
-
ns
APB1 bus clock
(PCLK1)
Internal operating
clock
cycle time
tCYCP2
-
25
-
ns
APB2 bus clock
(PCLK2)
0.8×Vcc
tCYLH
X0
PWH
0.2×Vcc
tCF
PWL
tCR
0.2×Vcc
Note: Please see the block diagram to refer the APB bus which peripherals connected.
Please see the clock chapter of peripheral manual to refer the detail of internal operating clock.
DS706-00021-1v0-E
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