
MB96380 Series
FME-MB96380 rev 10
10
2010-06-25
AD converter IAIN spec improved: 1uA valid up to 105deg, 1.2uA above 105deg
Note added that PLL phase jitter spec does not include jitter coming from Main
clock
Alarm comparator: Maximum power-up stabilization time increased to 10ms
Note added in DC characteristics how to select driving strength of ports
I2C AC spec updated: tof, Cb and tSP spec added, wrong footnotes and Condition
removed
I/O Circuit type: Note added for type “N” (slew rate control according to I2C spec)
Example characteristics updated, new gures added showing dependency of
PLL Run mode current on frequency
Updated Power Supply current spec in Run/Sleep/Timer/Stop modes (new spec
items in PLL Run/Sleep mode, small adjustment of most other values)
Package dimension: Added the following sentence under the gure: “Please
conrm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/”
AD converter: Impact of input pin capacitance and external capacitance added
to formula for calculation of the sampling time
Added specication of RC clock stabilization time
Feature description I2C: ‘8-bit addressing’ corrected to ‘7-bit addressing’
Feature description PPG: ‘Reload timer overow as clock input’ corrected to
‘Reload timer underow as clock input’
Company name updated on the cover page: Fujitsu Microelectronics Limited ->
Fujitsu Semiconductor Limited
Ordering information: MB96384/385**B -> MB96384/385**C, MB96F385/F388/
F389**A -> MB96F385/F388/F389**B, added devices under development
MB96F386**C and MB96F387**C
Revision
Date
Modication