參數(shù)資料
型號: MB96F326RSBPMC-GSE2
廠商: Fujitsu Semiconductor America Inc
文件頁數(shù): 43/108頁
文件大?。?/td> 0K
描述: IC MCU FLASHK/ROM MEMORY 80LQFP
標(biāo)準(zhǔn)包裝: 1
系列: F²MC MB96320
核心處理器: F²MC-16FX
芯體尺寸: 16-位
速度: 56MHz
連通性: CAN,EBI/EMI,I²C,LIN,SCI,UART/USART
外圍設(shè)備: DMA,LVD,LVR,POR,PWM,WDT
輸入/輸出數(shù): 66
程序存儲器容量: 288KB(288K x 8)
程序存儲器類型: 閃存
RAM 容量: 12K x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 18x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 125°C
封裝/外殼: 80-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 722 (CN2011-ZH PDF)
其它名稱: 865-1082
MB96320 Series
4
FME-MB96320 rev 7
Real Time Clock
Can be clocked either from sub oscillator (devices with part number suffix “W”), main
oscillator or from the RC oscillator
Facility to correct oscillation deviation of Sub clock or RC oscillator clock (clock
calibration)
Read/write accessible second/minute/hour registers
Can signal interrupts every half second/second/minute/hour/day
Internal clock divider and prescaler provide exact 1s clock
External Interrupts
Edge sensitive or level sensitive
Interrupt mask and pending bit per channel
Each available CAN channel RX has an external interrupt for wake-up
Selected USART channels SIN have an external interrupt for wake-up
Non Maskable Interrupt
Disabled after reset
Once enabled, can not be disabled other than by reset.
Level high or level low sensitive
Pin shared with external interrupt 0.
External bus interface
8-bit or 16-bit bidirectional data
Up to 24-bit addresses
6 chip select signals
Multiplexed address/data lines
Wait state request
External bus master possible
Timing programmable
I/O Ports
Virtually all external pins can be used as general purpose I/O
All push-pull outputs (except when used as I2C SDA/SCL line)
Bit-wise programmable as input/output or peripheral signal
Bit-wise programmable input enable
Bit-wise programmable input levels: Automotive / CMOS-Schmitt trigger / TTL
Bit-wise programmable pull-up resistor
Bit-wise programmable output driving strength for EMI optimization
Package
80-pin plastic LQFP
Feature
Description
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